Display module and large format display apparatus using the same

US11201202B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11201202-B2
Application numberUS-201916681290-A
CountryUS
Kind codeB2
Filing dateNov 12, 2019
Priority dateNov 16, 2018
Publication dateDec 14, 2021
Grant dateDec 14, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display module and a large format display apparatus incorporating the display module are provided. The display module includes a thin film transistor substrate, light emitting diodes arranged on one surface of the thin film transistor substrate, and side wirings formed on each of a first edge of the thin film transistor substrate and a second edge of the thin film transistor substrate that is adjacent to the first edge, to electrically couple components on the one surface of the thin film transistor substrate with components on an opposite surface of the one surface respectively.

First claim

Opening claim text (preview).

What is claimed is: 1. A display module comprising: a thin film transistor substrate; a plurality of light emitting diodes arranged on one surface of the thin film transistor substrate; a plurality of first connection pads formed at intervals on the one surface of the thin film transistor substrate; a plurality of second connection pads formed at intervals on an opposite surface of the one surface; and a plurality of side wirings formed on each of a first edge of the thin film transistor substrate and a second edge of the thin film transistor substrate that is adjacent to the first edge, the plurality of side wirings electrically coupling the plurality of first connection pads on the one surface of the thin film transistor substrate with respective ones of the plurality of second connection pads on the opposite surface. 2. The display module of claim 1 , wherein the plurality of side wirings are formed only on the first edge and the second edge. 3. The display module of claim 1 , wherein the plurality of side wirings are not formed on a third edge of the thin film transistor substrate or on a fourth edge of the thin film transistor substrate. 4. The display module of claim 1 , wherein the each of the plurality of side wirings is formed to connect the one surface, a side end surface and the opposite surface of the thin film transistor substrate, wherein, for each of the plurality of side wirings, one end of the side wiring is electrically coupled with a first connection pad disposed on the one surface of the thin film transistor substrate, and an other end of the side wiring is electrically coupled with a second connection pad disposed on the opposite surface of the thin film transistor substrate. 5. The display module of claim 1 , wherein the each of the plurality of side wirings is formed to connect the one surface, a side end surface and the opposite surface of the thin film transistor substrate, wherein, for each of the plurality of side wirings, one end of the side wiring is electrically coupled with a first connection pad disposed on the one surface of the thin film transistor substrate, and an other end of the side wiring is electrically coupled with an electronic element mounted to the opposite surface of the thin film transistor substrate. 6. The display module of claim 5 , wherein the electronic element is a data driver or a gate driver that drives the plurality of light emitting diodes of the display module. 7. A large format display apparatus comprising: a plurality of the display modules of claim 1 connected to each other, wherein the first edge and the second edge of each of the display modules are arranged on outside edges of the large format display apparatus. 8. The large format display apparatus of claim 7 , wherein a third edge and a fourth edge of each of the display modules are arranged and connected together on an inside of the large format display apparatus. 9. The large format display apparatus of claim 7 , wherein the plurality of the display modules comprise a first display module arranged at a position [ 1 , 1 ], a second display module arranged at a position [ 1 , 2 ], a third display module arranged at a position [ 2 , 1 ], and a fourth display module arranged at a position [ 2 , 2 ], wherein the first display module includes edges E 1 - 1 and E 1 - 2 that are each provided with the plurality of side wirings, and edges E 1 - 3 and E 1 - 4 that are not provided with the plurality of side wirings; wherein the second display module includes edges E 2 - 1 and E 2 - 3 that are each provided with the plurality of side wirings, and edges E 2 - 2 and E 2 - 4 that are not provided with the plurality of side wirings; wherein the third display module includes edges E 3 - 2 and E 3 - 4 that are each provided with the plurality of side wirings, and edges E 3 - 1 and E 3 - 3 that are not provided with the plurality of side wirings; wherein the fourth display module includes edges E 4 - 3 and E 4 - 4 that are each provided with the plurality of side wirings, and edges E 4 - 1 and E 4 - 2 that are not provided with the plurality of side wirings. 10. The large format display apparatus according to claim 9 , wherein edges E 1 - 3 and E 2 - 2 are connected, edges E 2 - 4 and E 4 - 1 are connected, edges E 3 - 3 and E 4 - 2 are connected, and edges E 1 - 4 and E 3 - 1 are connected. 11. A large format display apparatus, wherein a plurality of display modules are consecutively connected, each of the plurality of display modules comprising: a thin film transistor substrate; a plurality of light emitting diodes arranged on one surface of the thin film transistor substrate; a plurality of first connection pads formed at intervals on the one surface of the thin film transistor substrate; a plurality of second connection pads formed at intervals on an opposite surface of the one surface; and a plurality of side wirings formed on each of a first edge of the thin film transistor substrate and a second edge of the thin film transistor substrate that is adjacent to the first edge, the plurality of side wirings electrically coupling the plurality of first connection pads on the one surface of the thin film transistor substrate with respective ones of the plurality of second connection pads on the opposite surface. 12. The large format display apparatus of claim 11 , wherein each of the plurality of display modules is arranged such that edges having the side wirings are disposed toward an outer edge of the large format display apparatus. 13. The large format display apparatus of claim 11 , wherein every three light emitting diodes of the plurality of light emitting diodes comprise a pixel, wherein a plurality of the pixels are arranged on each of the plurality of display modules to form a lattice shape over the large format display apparatus, and wherein the pixels have a same pitch over the large format display apparatus. 14. The large format display apparatus of claim 11 , wherein the plurality of display modules comprise a first display module to a fourth display module connected together in a 2×2 arrangement such that an edge without side wirings of one of the first display module to the fourth display module is in contact with another edge without side wirings of another one of the first display module to the fourth display module. 15. The large format display apparatus of claim 14 , wherein every three light emitting diodes of the plurality of light emitting diodes comprise a pixel, wherein a plurality of the pixels are arranged on each of the first display module to the fourth display module in a lattice shape over the large format display apparatus, and wherein the pixels have a same pitch over the large format display apparatus. 16. The large format display apparatus of claim 14 , wherein the first display module is arranged at a position [ 1 , 1 ], a second display module is arranged at a position [ 1 , 2 ], a third display module is arranged at a position [ 2 , 1 ], and the fourth display module is arranged at a position [ 2 , 2 ], wherein the first display module includes edges E 1 - 1 and E 1 - 2 that are each provided with the plurality of side wirings, and edges E 1 - 3 and E 1 - 4 that are not provided with the plurality of side wirings; wherein the second display module includes edges E 2 - 1 and E 2 - 3 that are each provided with the plurality of side wirings, and edges E 2 - 2 and E 2 - 4 that are not provided with the plurality of side wirings; wherein the third display module includes edges E 3 - 2 and E 3 - 4 that are

Assignees

Inventors

Classifications

  • H10W90/00Primary

    Package configurations · CPC title

  • Interconnections, e.g. lead-frames, bond wires or solder balls · CPC title

  • Constructional details · CPC title

  • using an active matrix · CPC title

  • Layout of electrodes and connections · CPC title

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What does patent US11201202B2 cover?
A display module and a large format display apparatus incorporating the display module are provided. The display module includes a thin film transistor substrate, light emitting diodes arranged on one surface of the thin film transistor substrate, and side wirings formed on each of a first edge of the thin film transistor substrate and a second edge of the thin film transistor substrate that is…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 14 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).