Semiconductor on insulator structure comprising a buried high resistivity layer
US-2019080957-A1 · Mar 14, 2019 · US
Epitaxy substrate and method of manufacturing the same
US11201080B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11201080-B2 |
| Application number | US-201916354188-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 15, 2019 |
| Priority date | Apr 3, 2018 |
| Publication date | Dec 14, 2021 |
| Grant date | Dec 14, 2021 |
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Abstract
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An epitaxy substrate and a method of manufacturing the same are provided. The epitaxy substrate includes a device substrate and a handle substrate. The device substrate has a first surface and a second surface opposite to each other, and a bevel disposed between the first and the second surfaces. The handle substrate is bonded to the second surface of the device substrate, wherein the oxygen content of the device substrate is less than the oxygen content of the handle substrate, and a bonding angle greater than 90° is between the bevel of the device substrate and the handle substrate.
First claim
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What is claimed is: 1. An epitaxy substrate, comprising: a device substrate, having a first surface and a second surface opposite to each other, and a bevel disposed between the first surface and the second surface; and a handle substrate, bonded to the second surface of the device substrate, wherein an oxygen content of the device substrate is less than an oxygen content of the handle substrate, and a bonding angle greater than 90° is provided between the bevel of the device substrate and the handle substrate, wherein a projection length of the bevel toward the handle substrate is between 600 μm and 800 μm, wherein a thickness of the device substrate is greater than 100 μm and less than 200 μm. 2. The epitaxy substrate of claim 1 , wherein a resistivity of the device substrate is greater than a resistivity of the handle substrate. 3. The epitaxy substrate of claim 2 , wherein after annealing at 450° C. for one hour, the resistivity of the device substrate is greater than the resistivity of the handle substrate. 4. The epitaxy substrate of claim 2 , wherein after a heat treatment at 720° C. for two minutes, the resistivity of the device substrate is greater than the resistivity of the handle substrate. 5. The epitaxy substrate of claim 1 , wherein a resistivity of the device substrate is greater than 100 ohm-cm. 6. The epitaxy substrate of claim 1 , wherein an error value of crystal orientation of the device substrate is less than ±0.05 degree. 7. The epitaxy substrate of claim 1 , wherein the bonding angle is 100° to 170°. 8. The epitaxy substrate of claim 1 , wherein the oxygen content of the device substrate is less than 5 ppma. 9. The epitaxy substrate of claim 1 , further comprising a bonding layer disposed between the handle substrate and the device substrate. 10. The epitaxy substrate of claim 9 , further comprising a charge trapping layer disposed between the handle substrate and the bonding layer. 11. The epitaxy substrate of claim 1 , further comprising a protective layer disposed on a surface of the handle substrate that is not bonded to the device substrate. 12. The epitaxy substrate of claim 1 , wherein a diameter of the handle substrate and a diameter of the second surface of the device substrate are different by 0.2 mm or more. 13. The epitaxy substrate of claim 1 , further comprising an implantation region located within the first surface of the device substrate, wherein a distance between the implantation region and the first surface is 10 nm to 95 nm. 14. The epitaxy substrate of claim 1 , wherein a maximum deformation amount of the handle substrate is less than 6.5 mm.
Assignees
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Classifications
by edge treatment, e.g. chamfering · CPC title
of electrically inactive species · CPC title
into Group IV semiconductors · CPC title
Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers · CPC title
- H10P90/1914Primary
using bonding · CPC title
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- What does patent US11201080B2 cover?
- An epitaxy substrate and a method of manufacturing the same are provided. The epitaxy substrate includes a device substrate and a handle substrate. The device substrate has a first surface and a second surface opposite to each other, and a bevel disposed between the first and the second surfaces. The handle substrate is bonded to the second surface of the device substrate, wherein the oxygen co…
- Who is the assignee on this patent?
- Globalwafers Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10P90/1914. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Dec 14 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).