Testing semiconductor components

Patent metadata

Field	Value
Publication number	US-11201065-B2
Application number	US-202016791152-A
Country	US
Kind code	B2
Filing date	Feb 14, 2020
Priority date	Oct 31, 2019
Publication date	Dec 14, 2021
Grant date	Dec 14, 2021

Abstract

A method of manufacturing a semiconductor package includes covering a semiconductor die and a plurality of conductive terminals coupled to the semiconductor die in a mold compound, positioning the mold compound between a first pair of electrodes and a second pair of electrodes, and moving a movable electrode of the first pair and a movable electrode of the second pair into a first clamping position. In the first clamping position, each of the first pair of electrodes and the second pair of electrodes electrically couples to a unique subset of the plurality of conductive terminals. The method also includes applying, by the first pair of electrodes, a first voltage to the semiconductor die within the mold compound; and applying, by the second pair of electrodes, a second voltage to the semiconductor die within the mold compound. The second voltage is less than the first voltage.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor package, the method comprising:
covering a first semiconductor die and a first plurality of conductive terminals coupled to the first semiconductor die in a first mold compound;
positioning the first mold compound between a first pair of electrodes and a second pair of electrodes;
moving a movable electrode of the first pair and a movable electrode of the second pair into a first clamping position, wherein in the first clamping position each of the first pair of electrodes and the second pair of electrodes electrically couples to a unique subset of the first plurality of conductive terminals;
applying, by the first pair of electrodes, a first voltage to the first semiconductor die within the first mold compound; and
applying, by the second pair of electrodes, a second voltage to the first semiconductor die within the first mold compound;
wherein the second voltage is less than the first voltage.

2. The method of claim 1 , wherein positioning further comprises positioning using a pick-up head of a turret-type device handler.

3. The method of claim 1 , wherein moving further comprises moving the movable electrode of the first and second pairs of electrodes vertically.

4. The method of claim 1 , further comprising:
after applying the first and second voltages, moving the movable electrode of the first and second pairs of electrodes into an open position, wherein in the open position at least one of each of the first and second pairs of electrodes is not in contact with the first plurality of conductive terminals; and
removing the first mold compound from the electrodes.

5. The method of claim 4 , further comprising:
covering a second semiconductor die and a second plurality of conductive terminals coupled to the second semiconductor die in a second mold compound;
positioning the second mold compound between the first pair of electrodes and the second pair of electrodes;
moving the movable electrode of the first pair and the movable electrode of the second pair into a second clamping position, wherein in the second clamping position each of the first pair of electrodes and the second pair of electrodes electrically couples to a unique subset of the second plurality of conductive terminals;
applying, by the first pair of electrodes, a first voltage to the second semiconductor die within the second mold compound; and
applying, by the second pair of electrodes, a second voltage to the second semiconductor die within the second mold compound;
wherein the second voltage is less than the first voltage; and
wherein a height of the conductive terminals of the second mold compound is different than a height of the conductive terminals of the first mold compound.

6. The method of claim 5 , wherein a distance between each of the first pair of electrodes and the second pair of electrodes in the first clamping position is different than a distance between each of the first pair of electrodes and the second pair of electrodes in the second clamping position.

7. The method of claim 1 , wherein:
the first voltage is approximately equal to 1 to 20 kV; and
the second voltage is approximately equal to a voltage at a ground node.

8. A system, comprising:
a first pair of electrodes and a second pair of electrodes configured to receive a semiconductor die and a plurality of conductive terminals coupled to the semiconductor die in a mold compound, each of the first and second pairs of electrodes comprising a movable electrode;
wherein the movable electrode of the first and second pairs of electrodes is configured to move between an open position and a clamping position, wherein in the clamping position each of the first pair of electrodes and the second pair of electrodes electrically couples to a unique subset of the first plurality of conductive terminals;
wherein the first pair of electrodes is configured to apply a first voltage to the semiconductor die within the mold compound;
wherein the second pair of electrodes is configured to apply a second voltage to the semiconductor die within the mold compound; and
wherein the second voltage is less than the first voltage.

9. The system of claim 8 , wherein:
the first pair of electrodes comprises an inner face facing the second pair of electrodes;
the second pair of electrodes comprises an inner face facing the first pair of electrodes; and
a profile of each inner face comprises a Borda profile.

10. The system of claim 8 , wherein:
the first pair of electrodes comprises an inner face facing the second pair of electrodes;
the second pair of electrodes comprises an inner face facing the first pair of electrodes; and
a profile of each inner face comprises a Rogowski profile.

11. The system of claim 8 , wherein:
the first pair of electrodes comprises an inner face facing the second pair of electrodes;
the second pair of electrodes comprises an inner face facing the first pair of electrodes; and
a profile of each inner face comprises a curvilinear profile.

12. The system of claim 8 , wherein the movable electrode of the first and second pairs of electrodes is configured move vertically between the open position and the clamping position.

13. The system of claim 8 , wherein:
the movable electrode of each of the first and second pairs of electrodes is configured to move between an open position and at least a first and second clamping position; and
a distance between each of the first pair of electrodes and the second pair of electrodes in the first clamping position is different than a distance between each of the first pair of electrodes and the second pair of electrodes in the second clamping position.

14. The system of claim 8 , further comprising a turret-type device handler comprising a pick-up head configured to:
position the mold compound between the first and second pairs of electrodes; and
remove the mold compound from between the first and second pairs of electrodes.

15. The system of claim 8 , wherein:
the first voltage is approximately equal to 1 to 20 kV; and
the second voltage is approximately equal to a voltage at a ground node.

Assignees

• Texas Instruments Inc

Inventors

• Tuncer Enis
• Gibbs Byron Harry

Classifications

• H10P72/76

  using mechanical means, e.g. clamps or pinches · CPC title

• H10W74/111

  the semiconductor body being completely enclosed · CPC title

• H10W74/01 Primary

  Manufacture or treatment · CPC title

• H10P74/207 Primary

  Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics · CPC title

• G01R31/2896 Primary

  Testing of IC packages; Test features related to IC packages (containers per se H10W76/10, encapsulations per se H10W74/00) · CPC title