Thermal detector and thermal detector array

Patent metadata

Field	Value
Publication number	US-11199455-B2
Application number	US-201816642939-A
Country	US
Kind code	B2
Filing date	Aug 31, 2018
Priority date	Aug 31, 2017
Publication date	Dec 14, 2021
Grant date	Dec 14, 2021

Abstract

A wafer-level integrated thermal detector comprises a first wafer and a second wafer (W 1 , W 2 ) bonded together. The first wafer (W 1 ) includes a dielectric or semiconducting substrate ( 100 ), a dielectric sacrificial layer ( 102 ) deposited on the substrate, a support layer ( 104 ) deposited on the sacrificial layer or the substrate, a suspended active element ( 108 ) provided within an opening ( 106 ) in the support layer, a first vacuum-sealed cavity ( 110 ) and a second vacuum-sealed cavity ( 106 ) on opposite sides of the suspended active element. The first vacuum-sealed cavity ( 110 ) extends into the sacrificial layer ( 102 ) at the location of the suspended active element ( 108 ). The second vacuum-sealed cavity ( 106 ) comprises the opening of the support layer ( 104 ) closed by the bonded second wafer. The thermal detector further comprises front optics ( 120 ) for entrance of radiation from outside into one of the first and second vacuum-sealed cavities, aback reflector ( 112 ) arranged to reflect radiation back into the other one of the first and second vacuum-sealed cavities, and electrical connections ( 114 ) for connecting the suspended active element to a readout circuit ( 118 ).

First claim

The invention claimed is:

1. A wafer-level integrated thermal detector, comprising
a first wafer and a second wafer bonded together, wherein the first wafer includes a dielectric or semiconducting substrate, a wafer-wide or patterned local dielectric or semiconducting sacrificial layer deposited on the substrate, a support layer deposited on the dielectric or semiconducting sacrificial layer, a suspended active element provided within an opening in the support layer,
a first vacuum-sealed cavity and a second vacuum-sealed cavity on opposite sides of the suspended active element, wherein the first vacuum-sealed cavity extends into the sacrificial layer at the location of the suspended active element, and the second vacuum-sealed cavity comprises the opening of the support layer closed by the bonded second wafer,
front optics for entrance of radiation from outside into one of the first and second vacuum-sealed cavities,
a back reflector arranged to reflect radiation back into the other one of the first and second vacuum-sealed cavities, the back reflector comprising one or more of: a Distributed Bragg reflector, a controllable moving back mirror, a Fabry-Perot interferometer, a tuneable Fabry-Perot interferometer, and a back reflector made of doped semiconductor material, and
electrical connections for connecting the suspended active element to a readout circuit.

2. An integrated thermal detector according to claim 1 , wherein the wafer bonded first and second wafers comprise fusion-activated wafer bonded first and second wafers or thermocompression wafer bonded first and second wafers or metal-based wafer bonded first and second wafers.

3. An integrated thermal detector according to claim 1 , wherein the electrical connections are configured to be connected to an integrated readout circuit on a third wafer, by a thermocompression bonding or another type of metal-based bonding or a chip bonding.

4. An integrated thermal detector according to claim 1 , wherein the front optics comprises one or more of: a transparent substrate, a window in a substrate, an anti-reflective coating, a lens, a filter, a front mirror, a controllable moving front mirror, a Fabry-Perot interferometer, a tuneable Fabry-Perot interferometer.

5. An integrated thermal detector according to claim 1 , wherein the back reflector is provided on an inner side of the first wafer, or on outer side of the other one of the second wafer behind a transparent substrate or a window, or in an opening provided in the second wafer.

6. An integrated thermal detector according to claim 1 , wherein the support layer further comprises a shoulder portion on a periphery of the opening for mechanical and electrical connection of the suspended active element, wherein a layer thickness of the shoulder portion is smaller than a layer thickness of the remaining portion of the support layer, and wherein the thinner shoulder portion is preferably offset from a bonded surface of the first wafer.

7. An integrated thermal detector according to claim 1 , wherein the back reflector is provided on an inner side of the second wafer, or on an outer side of first wafer behind a transparent substrate or a window, or in an opening provided in the first wafer.

8. An integrated thermal detector according to claim 1 , comprising a movable reflector of a Fabry-Pérot interferometer in one of the first and second vacuum-sealed cavities, wherein a vacuum space is present on both sides of the movable reflector.

9. An integrated thermal detector chip according to claim 8 , wherein both a fixed reflector and the movable reflector of the Fabry-Pérot interferometer are arranged in the same one of the first and second vacuum-sealed cavities on a front side of the suspended active element, the front side facing to a direction of the front optics.

10. An integrated thermal detector according to claim 8 , wherein the movable reflector is arranged in the one of the first and second vacuum-sealed cavities on a back side of the suspended active element, the back side facing to a direction of the back reflector.

11. An integrated thermal detector according to claim 10 , wherein the movable reflector is configured to operate as said back reflector.

12. An integrated thermal detector according to claim 10 , wherein a fixed reflector of the Fabry-Pérot interferometer is arranged on a front side of the suspended active element, the front side facing to a direction of the front optics.

13. An integrated thermal detector according to claim 8 , comprising a support structure arranged to mechanically support the movable reflector within the one of the first and second vacuum-sealed cavities.

14. An integrated thermal detector according to claim 8 , comprising electrical connections arranged to connect the movable reflector to an actuation control for tuning the Fabry-Pérot interferometer.

15. An integrated thermal detector according to claim 14 , wherein the electrical connections of the movable reflector comprise a pair of electrostatic actuation electrodes.

16. An integrated thermal detector according to claim 15 , wherein the thermal detector is arranged to absorb electromagnetic radiation in one of the following wavelength ranges: ultraviolet (UV) light, visible light, infrared (IR) light, Tera-Hertz (THz) radiation, and X-rays.

17. An integrated thermal detector according to claim 1 , wherein the doped semiconductor material comprises single-crystalline silicon or polycrystalline silicon.

18. A wafer-level integrated thermal detector array comprising a plurality of wafer-level integrated thermal detectors, each wafer-level integrated thermal detector comprising
a first wafer and a second wafer bonded together, wherein the first wafer includes a dielectric or semiconducting substrate, a wafer-wide or patterned local dielectric sacrificial layer deposited on the substrate, a support layer deposited on the dielectric or semiconducting sacrificial layer, a suspended active element provided within an opening in the support layer,
a first vacuum-sealed cavity and a second vacuum-sealed cavity on opposite sides of the suspended active element, wherein the first vacuum-sealed cavity extends into the sacrificial layer at the location of the suspended active element, and the second vacuum-sealed cavity comprises the opening of the support layer closed by the bonded second wafer,
front optics for entrance of radiation from outside into one of the first and second vacuum-sealed cavities,
a back reflector arranged to reflect radiation back into the other one of the first and second vacuum-sealed cavities, the back reflector comprising one or more of: a Distributed Bragg reflector, a controllable moving back mirror, a Fabry-Perot interferometer, a tuneable Fabry-Perot interferometer, and a back reflector made of doped semiconductor material, and electrical connections for connecting the suspended active element to a readout circuit.

19. A wafer-level integrated thermal detector array according to claim 18 , wherein the doped semiconductor material comprises single-crystalline silicon or polycrystalline silicon.

20. A prefabricated intermediate product for manufacture of a wafer-level integrated thermal detector or an array of wafer-level integrated thermal detectors, each wafer-level integrated thermal detector comprising
a first wafer and a second wafer bonded together, wherein the first wafer includes a dielectric or semiconducting substrate, a wafer-wide or patterned local dielectric sacrificial layer deposited on the substrate,

Assignees

• Teknologian Tutkimuskeskus Vtt Oy

Inventors

• Varpula Aapo
• Guo Bin

Classifications

• H10W90/00

  Package configurations · CPC title

• G01J5/0813

  Planar mirrors; Parallel phase plates · CPC title

• H10F77/407

  indirectly associated with the devices · CPC title

• H10F77/95

  Circuit arrangements · CPC title

• H10F39/107

  having multiple elements covered by H10F30/00 in a repetitive configuration, e.g. radiation detectors comprising photodiode arrays · CPC title