Multi-pixel caching scheme for lossless encoding

Patent metadata

Field	Value
Publication number	US-11190787-B2
Application number	US-201916687014-A
Country	US
Kind code	B2
Filing date	Nov 18, 2019
Priority date	Nov 16, 2016
Publication date	Nov 30, 2021
Grant date	Nov 30, 2021

Abstract

Systems and methods are provided for encoding a multi-pixel caching scheme for lossless encoders. The systems and methods can include obtaining a sequence of pixels, determining repeating sub-sequences of the sequence of pixels consisting of a single repeated pixel and non-repeating sub-sequences of the sequence of pixels, responsive to the determination, encoding the repeating sub-sequences using a run-length of the repeated pixel and encoding the non-repeating sub-sequences using a multi-pixel cache, wherein the encoding using a multi-pixel cache comprises, encoding non-repeating sub-sequences stored in the multi-pixel cache as the location of the non-repeating sub-sequences in the multi-pixel cache, and encoding non-repeating sub-sequences not stored in the multi-pixel cache using the value of the pixels in the non-repeating sub-sequences.

First claim

What is claimed is:

1. A method, comprising:
obtaining, by a computing device, encoded data to be decoded, the encoded data including (i) a first data unit referencing a sub-cache of a plurality of sub-caches that is associated with a total number of non-repeated pixel values contained in a given non-repeating sub-sequence of a sequence of pixels and (ii) a second data unit referencing an index value of a storage location within the referenced sub-cache where the given non-repeating sub-sequence is stored;
decoding, by the computing device, the encoded data using the first and second data units to generate decoded data comprising the given non-repeating sub-sequence of the sequence of pixels in a decoded format; and
providing, by the computing device, the decoded data in which the given non-repeating sub-sequence is decompressed, and the given non-repeating sub-sequence which is decompressed further including a total number of bytes larger than a corresponding portion of the encoded data.

2. The method of claim 1 , further comprising decoding, by the computing device, a remaining portion of the encoded data by determining whether a multi-pixel cache miss exists.

3. The method of claim 2 , further comprising in response to a determination that the multi-pixel cache miss exists, determining, by the computing device, whether a single-pixel sub-cache hit or a single-pixel sub-cache miss exists.

4. The method of claim 3 , further comprising in response to a determination that the single-pixel sub-cache hit exists, decoding, by the computing device, the encoded data using data previously stored in a single-pixel sub-cache of a multi-pixel cache.

5. The method of claim 3 , further comprising in response to a determination that the single-pixel sub-cache miss exists, decoding, by the computing device, the encoded data with raw pixel data of the encoded data.

6. The method of claim 1 , wherein the one byte of data represented by a third data unit of the encoded data is decoded as multi-pixel miss and a single-pixel miss.

7. The method of claim 1 , further comprising updating, by the computing device, a single pixel cache with a plurality of single-pixel cache misses to ensure data within the single pixel cache matches data stored in an encoder.

8. The method of claim 1 , further comprising decoding, by the computing device, another portion of the sequence of pixels using a third data unit of the encoded data that is indicative of an index representative of a pixel subsequence.

9. The method of claim 1 , wherein the encoded data comprises an image file.

10. The method of claim 9 , wherein the decoding of the encoded data results in a lossless compression of the image file.

11. The method of claim 9 , wherein the image file has a Portable Network Graphics (“PNG”) format.

12. A device comprising:
a memory; and
a processor coupled to the memory and configured to
obtain encoded data to be decoded, the encoded data including (i) a first data unit referencing a sub-cache of a plurality of sub-caches that is associated with a total number of non-repeated pixel values contained in a given non-repeating sub-sequence of a sequence of pixels and (ii) a second data unit referencing an index value of a storage location within the references sub-cache where the given non-repeating sub-sequence is stored;
decode the encoded data using the first and second data units to generate decoded data comprising the given non-repeating sub-sequence of the sequence of pixels in a decoded formate; and
provide the decoded data in which the given non-repeating sub-sequence is decompressed and the given non-repeating sub-sequence which is decompressed further including a total number of bytes larger than a corresponding portion of the encoded data.

13. The device of claim 12 , wherein the processor is further configured to decode a remaining portion of the encoded data by determining whether a multi-pixel cache miss exists.

14. The device of claim 13 , wherein in response to a determination that the multi-pixel cache miss exists, the processor is further configured to determine whether a single-pixel sub-cache hit or a single-pixel sub-cache miss exists.

15. The device of claim 14 , wherein in response to a determination that the single-pixel sub-cache hit exists, the processor is further configured to decode the encoded data using data previously stored in a single-pixel sub-cache of a multi-pixel cache.

16. The device of claim 14 , wherein in response to a determination that that single-pixel sub-cache miss exists, the processor is further configured to decode the encoded data with raw pixel data of the encoded data.

17. The device of claim 12 , wherein the processor is further configured to update a single pixel cache with a plurality of single-pixel cache misses to ensure data within the single pixel cache matches data stored in an encoder.

18. The device of claim 12 , wherein the processor is further configured to decode another portion of the sequence of pixels using a third data unit of the encoded data that is indicative of an index representative of a pixel subsequence.

19. A non-transitory computer readable medium encoded with instructions that when executed by one or more processors facilitate operation of an electronic device according to a process, the process comprising:
obtaining encoded data to be decoded, the encoded data including (i) a first data unit referencing a sub-cache of a plurality of sub-caches that is associated with a total number of non-repeated pixel values contained in a given non-repeating sub-sequence of a sequence of pixels and (ii) a second data unit referencing an index value of a storage location within the referenced sub-cache where the given non-repeating sub-sequence is stored;
decoding the encoded data using the first and second data units to generate decoded data comprising the given non-repeating sub-sequence of the sequence of pixels in a decoded format; and
providing the decoded data in which the given non-repeating sub-sequence is decompressed, and the given non-repeating sub-sequence which is decompressed further including a total number of bytes larger than a corresponding portion of the encoded data.

20. The computer readable medium of claim 19 , further comprising updating a single pixel cache with a plurality of single-pixel cache misses to ensure data within the single pixel cache matches data stored in an encoder.

Assignees

• Citrix Systems Inc

Inventors

• Dawood Muhammad A

Classifications

• G09G5/006 Primary

  Details of the interface to the display terminal (specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04) · CPC title

• G09G2330/021

  Power management, e.g. power saving · CPC title

• G09G2360/08

  Power processing, i.e. workload management for processors involved in display operations, such as CPUs or GPUs · CPC title

• G09G2360/18

  Use of a frame buffer in a display terminal, inclusive of the display panel · CPC title

• H04N19/94

  Vector quantisation · CPC title