Synchronizing a stale component of a distributed object using multiple delta components during maintenance

Patent metadata

Field	Value
Publication number	US-11182261-B1
Application number	US-202017106050-A
Country	US
Kind code	B1
Filing date	Nov 27, 2020
Priority date	Nov 27, 2020
Publication date	Nov 23, 2021
Grant date	Nov 23, 2021

Abstract

The disclosure herein describes enhancing data durability of a base component using multiple delta components. A first and second delta component are generated based on the base component becoming unavailable. A write operation targeted for the base component is routed to the first delta component and to the second delta component. Based on routing the write operation targeted for the base component to the first delta component and to the second delta component, a bit associated with a data block affected by the write operation is changed in each of the tracking bitmaps of the first and second delta components. Based on detecting the base component becoming available, one delta component of the first and second delta components is selected, and the data block affected by the routed write operation is synchronized from the selected delta component to the base component. Later, the first and second delta components are removed.

First claim

What is claimed is:

1. A method for enhancing data durability of a base component using multiple delta components, the method comprising:
generating, by a processor, a first delta component on a first fault domain and a second delta component on a second fault domain based on the base component becoming unavailable, wherein each of the first delta component and the second delta component is configured to include (a) unwritten storage space with an address space matching an address space of the base component and (b) a tracking bitmap including a plurality of bits associated with data blocks of the address space of the delta component;
routing, by the processor, a write operation targeted for the base component to the first delta component and to the second delta component;
based on routing the write operation targeted for the base component to the first delta component and to the second delta component, changing, by the processor, a bit associated with a data block affected by the routed write operation in the tracking bitmap of the first delta component and changing a bit associated with the data block affected by the routed write operation in the tracking bitmap of the second delta component;
based on detecting the base component becoming available, selecting, by the processor, one delta component of the first delta component and the second delta component for synchronization;
synchronizing, by the processor, using the tracking bitmap of the selected delta component, the data block affected by the routed write operation from the selected delta component to the base component; and
removing, by the processor, the first delta component and the second delta component.

2. The method of claim 1 , wherein synchronizing the data block affected by the routed write operation from the selected delta component to the base component includes:
identifying a subset of data locations in the affected data block to which data has been written in the selected delta component; and
writing the identified subset of data locations to which data has been written from the selected delta component to the base component.

3. The method of claim 1 , wherein generating the first delta component and the second delta component is based on receiving a notification prior to the base component becoming unavailable, and wherein the first delta component and the second delta component are generated prior to the base component becoming unavailable.

4. The method of claim 1 , further comprising:
identifying, by the processor, a set of synchronization sources based on detecting the base component becoming available, wherein the set of synchronization sources includes the first delta component, the second delta component, and at least one mirrored component associated with the base component; and
selecting, by the processor, one delta component of the first delta component and the second delta component as a synchronization source for the base component based on a defined prioritization of available delta components.

5. The method of claim 1 , wherein selecting one delta component of the first delta component and the second delta component includes selecting the first delta component, and the method further comprising:
detecting, by the processor, that the first delta component is unavailable and that synchronizing the data block affected by the routed write operation from the selected delta component to the base component is incomplete;
based on detecting that the synchronizing is incomplete, selecting, by the processor, the second delta component; and
synchronizing, by the processor, using the tracking bitmap of the selected second delta component, the data block affected by the routed write operation from the selected second delta component to the base component.

6. The method of claim 1 , wherein changing the bit associated with the data block affected by the routed write operation in the tracking bitmap further includes updating allocation metadata of the data block, the updated allocation metadata indicating granular data regions within the data block that are affected by the routed write operation; and
wherein synchronizing, using the tracking bitmap of the selected delta component, the data block affected by the routed write operation from the selected delta component to the base component further includes identifying the granular data regions within the data block for synchronization based on the allocation metadata of the data block.

7. The method of claim 1 , wherein routing the write operation targeted for the base component to the first delta component and the second delta component includes:
collecting votes from components on whether to commit the write operation based on a two-phase commit protocol, wherein the first delta component and the second delta component have equal voting weight to other components to which the write operation is targeted; and
based on a quantity of the collected votes meeting a threshold quantity, committing the write operation to the first delta component and the second delta component.

8. A computer system for enhancing data durability of a base component using multiple delta components, the computer system comprising:
a processor; and
a non-transitory computer readable medium having stored thereon program code for transferring data to another computer system, the program code causing the processor to:
generate a first delta component on a first fault domain and a second delta component on a second fault domain based on the base component becoming unavailable, wherein each of the first delta component and the second delta component is configured to have (a) an address space matching an address space of the base component and (b) a tracking bitmap including a plurality of bits associated with data blocks of the address space of the delta component;
route a write operation targeted for the base component to the first delta component and to the second delta component;
based on routing the write operation targeted for the base component to the first delta component and to the second delta component, change a bit associated with a data block affected by the routed write operation in the tracking bitmap of the first delta component and changing a bit associated with the data block affected by the routed write operation in the tracking bitmap of the second delta component;
based on detecting the base component becoming available, select one delta component of the first delta component and the second delta component for synchronization;
synchronize, using the tracking bitmap of the selected delta component, the data block affected by the routed write operation from the selected delta component to the base component; and
remove the first delta component and the second delta component.

9. The computer system of claim 8 , wherein synchronizing the data block affected by the routed write operation from the selected delta component to the base component includes:
identifying a subset of data locations in the affected data block to which data has been written in the selected delta component; and
writing the identified subset of data locations to which data has been written from the selected delta component to the base component.

10. The computer system of claim 8 , wherein generating the first delta component and the second delta component is based on receiving a notification prior to the base component becoming unavailable, and wherein the first delta component and the second delta component are generated prior to the base component becoming unavailable.

11. The computer system of claim 8 , wherein the program code is further operative to:
identify a set of synchronization so

Assignees

• Vmware Inc

Inventors

• Knauft Eric
• Xiang Enning
• Thornycroft Ojan
• Xu Yiqi
• Desai Asit
• Shah Varun

Classifications

• G06F11/2094

  Redundant storage or storage space (G06F11/2056 takes precedence) · CPC title

• G06F11/1076 Primary

  Parity data used in redundant arrays of independent storages, e.g. in RAID systems · CPC title

• G06F11/0772

  Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers · CPC title

• G06F11/2056

  by mirroring · CPC title

• G06F11/1435

  using file system or storage system metadata · CPC title