Selectively changing arithmetic data types used in arithmetic execution of deep learning applications based on expressible ratio and fluctuation value comparisons to threshold values

US11182156B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11182156-B2
Application numberUS-202016744240-A
CountryUS
Kind codeB2
Filing dateJan 16, 2020
Priority dateFeb 26, 2019
Publication dateNov 23, 2021
Grant dateNov 23, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

An information processing apparatus includes: a memory; and a processor coupled to the memory and configured to: perform an arithmetic operation using an arithmetic operation target; repeat the arithmetic operation by using a calculated arithmetic operation result; obtain a ratio of, in a first number of elements which are included in the arithmetic operation result, a second number of elements in an expressible range as a predetermined-bit fixed point; and perform the arithmetic operation by using the predetermined-bit fixed point based on the ratio.

First claim

Opening claim text (preview).

What is claimed is: 1. An information processing apparatus comprising: a memory; and a processor coupled to the memory and configured to: perform an iteration operation, which repeats an arithmetic operation a predetermined times using sequentially a calculated arithmetic operation result obtained by the arithmetic operation using an arithmetic operation target, a plurality of times; obtain, for each iteration operation, a ratio of a first number of first elements in an expressible range as a predetermined-bit fixed point among second elements included in each calculated arithmetic operation result of each arithmetic operation of the predetermined times with respect to a second number of the second elements; store, in the memory, the ratio in association with the corresponding arithmetic operation and the corresponding iteration operation; and perform the arithmetic operation by using the predetermined-bit fixed point based on the ratio stored in the memory. 2. The information processing apparatus according to claim 1 , wherein the processor is configured to: determine a decimal point position based on the second number: and obtain the ratio of the first number as the predetermined-bit fixed point with the decimal point position. 3. The information processing apparatus according to claim 1 , wherein the processor is configured to: perform the arithmetic operation by using the predetermined-bit fixed point in a case where the ratio is larger than a predetermined ratio threshold. 4. The information processing apparatus according to claim 1 , wherein the processor is configured to: obtain the ratio each time when calculating the arithmetic operation result; and perform the arithmetic operation by using the predetermined-bit fixed point based on a change in the ratio between a latest ratio and a predetermined-times previous ratio. 5. The information processing apparatus according to claim 1 , wherein the processor is configured to: perform the arithmetic operation by using a first predetermined-bit fixed point or a second predetermined-bit fixed point based on the ratio. 6. The information processing apparatus according to claim 1 , wherein the processor is configured to: perform the arithmetic operation by using a floating point based on the ratio. 7. A control method comprising: performing, by an information processing apparatus, an iteration operation, which repeats an arithmetic operation a predetermined times using sequentially a calculated arithmetic operation result obtained by the arithmetic operation using an arithmetic operation target, a plurality of times; obtaining, for each iteration operation, a ratio of a first number of first elements in an expressible range as a predetermined-bit fixed point among second elements included in each calculated arithmetic operation result of each arithmetic operation of the predetermined times with respect to a second number of the second elements; storing, in a memory, the ratio in association with the corresponding arithmetic operation and the corresponding iteration operation; and making the information processing apparatus perform the arithmetic operation by using the predetermined-bit fixed point based on the calculated ratio stored in the memory. 8. A non-transitory computer-readable recording medium having stored therein a control program for causing a computer to execute a process comprising: performing an iteration operation, which repeats an arithmetic operation a predetermined times using sequentially a calculated arithmetic operation result obtained by the arithmetic operation using an arithmetic operation target plurality of times; obtaining, for each iteration operation, a ratio of a first number of first elements in an expressible range as a predetermined-bit fixed point among second elements included in each calculated arithmetic operation result of each arithmetic operation of the predetermined times with respect to a second number of the second elements; storing, in a memory, the ratio in association with the corresponding arithmetic operation and the corresponding iteration operation; and performing the arithmetic operation by using the predetermined-bit fixed point based on the calculated ratio stored in the memory.

Assignees

Inventors

Classifications

  • Combinations of networks · CPC title

  • Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title

  • G06F9/3001Primary

    Arithmetic instructions · CPC title

  • G06N3/08Primary

    Learning methods · CPC title

  • according to execution mode, e.g. mode flag · CPC title

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Frequently asked questions

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What does patent US11182156B2 cover?
An information processing apparatus includes: a memory; and a processor coupled to the memory and configured to: perform an arithmetic operation using an arithmetic operation target; repeat the arithmetic operation by using a calculated arithmetic operation result; obtain a ratio of, in a first number of elements which are included in the arithmetic operation result, a second number of elements…
Who is the assignee on this patent?
Fujitsu Ltd
What technology area does this patent fall under?
Primary CPC classification G06F9/3001. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 23 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).