Digital-to-analog converter

Patent metadata

Field	Value
Publication number	US-11171663-B2
Application number	US-202016833729-A
Country	US
Kind code	B2
Filing date	Mar 30, 2020
Priority date	Mar 29, 2019
Publication date	Nov 9, 2021
Grant date	Nov 9, 2021

Abstract

A digital-to-analog converter is provided. The digital-to-analog converter includes a first plurality of digital-to-analog converter cells configured to generate a first analog signal. Further, digital-to-analog converter includes a second plurality of digital-to-analog converter cells configured to generate a second analog signal. The first analog signal and the second analog signal form a differential signal pair. Further, the digital-to-analog converter includes a transmission line transformer comprising a first input node coupled to the first plurality of digital-to-analog converter cells, a second input node coupled to the second plurality of digital-to-analog converter cells, and a first output node. The transmission line transformer is configured to present a first impedance at the first and second input nodes and to present a second impedance at the first output node.

First claim

What is claimed is:

1. A digital-to-analog converter, comprising:
a digital-to-analog converter core comprising:
one or more first digital-to-analog converter cells configured to generate a first analog signal,
wherein the one or more first digital-to-analog converter cells is capable of generating the first analog signal with a minimum signal frequency of less than a first frequency value and a maximum signal frequency of more than a second frequency value,
wherein the first frequency value is between 500 MHz and 1 GHz, and
wherein the second frequency value is 5 GHz or more; and

one or more second digital-to-analog converter cells configured to generate a second analog signal, wherein the first analog signal and the second analog signal form a differential signal pair; and
a transmission line transformer coupled to the digital-to-analog converter and an output node of the digital-to-analog converter,
wherein the transmission line transformer is configured to perform an impedance transformation along the digital-to-analog converter core and the output node of the digital-to-analog converter,
wherein an impedance provided to the digital-to-analog converter core by the transmission line transformer is at least four times lower than an impedance provided by the transmission line transformer to the output node of the digital-to-analog converter.

2. The digital-to-analog converter of claim 1 , wherein the transmission line transformer is a Guanella-type transmission line transformer.

3. The digital-to-analog converter of claim 1 , wherein the transmission line transformer is a Ruthroff-type transmission line transformer.

4. The digital-to-analog converter of claim 1 , wherein at least one of the one or more first digital-to-analog converter cells comprises:
a capacitive element configured to generate an analog cell output signal based on a drive signal, wherein the first analog signal is based on the analog cell output signal; and
a driver circuit configured to generate the drive signal for the capacitive element.

5. The digital-to-analog converter of claim 1 , wherein the transmission line transformer comprises a first input node coupled to the one or more first digital-to-analog converter cells, a second input node coupled to the one or more second digital-to-analog converter cells, and a first output node coupled to the output node of the digital-to-analog converter.

6. The digital-to-analog converter of claim 5 , wherein the transmission line transformer further comprises a second output node coupled to another output node of the digital-to-analog converter, wherein the transmission line transformer is further configured to perform impedance transformation between the DAC core and the other output node of the digital-to-analog converter.

7. The digital-to-analog converter of claim 5 , wherein the transmission line transformer further comprises a second output node coupled to ground.

8. The digital-to-analog converter of claim 1 , wherein the one or more first digital-to-analog converter cells and the transmission line transformer are integrated in a same semiconductor die.

9. A transmitter, comprising:
a digital-to-analog converter according to claim 1 ; and
digital circuitry configured to supply digital data as input to the digital-to-analog converter.

10. The transmitter of claim 9 , wherein the digital circuitry is configured to generate the digital data based on data to be wirelessly transmitted.

11. A mobile device, comprising:
a transmitter according to claim 9 ; and
at least one antenna element coupled to the digital-to-analog converter.

12. The mobile device of claim 11 , further comprising a receiver configured to receive a radio frequency receive signal from the antenna element.

13. A base station, comprising:
a transmitter according to claim 9 ; and
at least one antenna element coupled to the digital-to-analog converter.

14. The base station of claim 13 , further comprising a receiver configured to receive a radio frequency receive signal from the antenna element.

Assignees

• Intel Corp

Inventors

• Gruber Daniel
• Sanchez Ramon
• Azadet Kameran
• Clara Martin

Classifications

• H03H7/42

  Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns · CPC title

• H01F19/04 Primary

  Transformers or mutual inductances suitable for handling frequencies considerably beyond the audio range (resonant circuits H03H) · CPC title

• H03H7/383

  comprising distributed impedance elements together with lumped impedance elements · CPC title

• H04B1/04

  Circuits · CPC title

• H03H7/38

  Impedance-matching networks · CPC title