Reconfigurable filter network with shortened settling time

Patent metadata

Field	Value
Publication number	US-11165414-B2
Application number	US-201916723223-A
Country	US
Kind code	B2
Filing date	Dec 20, 2019
Priority date	Dec 20, 2019
Publication date	Nov 2, 2021
Grant date	Nov 2, 2021

Abstract

A filter circuit includes a first stage comprising a first infinite impulse response (IIR) filter; a third stage comprising a third IIR filter; and a second stage interposed between the first stage and the third stage, the second stage comprising a second IIR filter, where an output terminal of the first IIR filter is coupled to an input terminal of the second IIR filter, and an output terminal of the second IIR filter is coupled to an input terminal of the third IIR filter, where the second stage of the filter circuit is configured to operate in an acquisition mode when a transient is detected in an input signal to the first IIR filter, where during the acquisition mode, the second stage of the filter circuit is bypassed.

First claim

What is claimed is:

1. A filter circuit comprising:
a first stage comprising a first infinite impulse response (IIR) filter;
a third stage comprising a third IIR filter;
a second stage interposed between the first stage and the third stage, the second stage comprising a second IIR filter, wherein an output terminal of the first IIR filter is coupled to an input terminal of the second IIR filter, and an output terminal of the second IIR filter is coupled to an input terminal of the third IIR filter, wherein the second stage of the filter circuit is configured to operate in an acquisition mode when a transient is detected in an input signal to the first IIR filter, wherein during the acquisition mode, the second stage of the filter circuit is bypassed; and
a monitoring circuit coupled to the first stage, the second stage, and the third stage, wherein the monitoring circuit is configured to:
compute a difference between an output of the third IIR filter and a scaled version of an output of the first IIR filter;
declare detection of the transient in the input signal to the first IIR filter when the computed difference is larger than a pre-determined threshold; and
in response to the detection of the transient, set the second stage of the filter circuit into the acquisition mode.

2. The filter circuit of claim 1 , wherein the first IIR filter, the second IIR filter, and the third IIR filter are first-order IIR filters.

3. The filter circuit of claim 2 , wherein during the acquisition mode, a first scaled version of an output of the first IIR filter is loaded into a register of the second IIR filter.

4. The filter circuit of claim 3 , wherein the first scaled version of the output of the first IIR filter is a value equal to the output of the first IIR filter multiplied with a direct current (DC) gain of the second IIR filter.

5. The filter circuit of claim 4 , wherein a time response of the filter circuit is faster when the second stage operates in the acquisition mode than when the second stage operates in a tracking mode, wherein in the tracking mode, the second stage functions as a low-pass filter.

6. The filter circuit of claim 4 , wherein the second stage further comprises a fourth IIR filter, wherein the fourth IIR filter is coupled in series between the second IIR filter and the third IIR filter, wherein during the acquisition mode, a second scaled version of the output of the first IIR filter is loaded into a register of the fourth IIR filter.

7. The filter circuit of claim 6 , wherein the second scaled version of the output of the first IIR filter is a value equal to the first scaled version of the output of the first IIR filter multiplied with a DC gain of the fourth IIR filter.

8. The filter circuit of claim 1 , wherein the scaled version of the output of the first IIR filter is a value equal to the output of the first IIR filter multiplied with a combined DC gain, wherein the combined DC gain is equal to a multiplication of DC gains of all filters disposed between the first IIR filter and an output terminal of the third IIR filter.

9. The filter circuit of claim 1 , wherein the monitoring circuit is further configured to:
after setting the second stage of the filter circuit into the acquisition mode, detect that the transient is over; and
in response to detecting that the transient is over, set the second stage of the filter circuit in a tracking mode different from the acquisition mode, wherein during the tracking mode, for each input sample at the input terminal of the first IIR filter, a register of the second IIR filter is updated with a value determined by an output of the first IIR filter and by a previous output value of the second IIR filter stored in the register of the second IIR filter.

10. The filter circuit of claim 1 , wherein the second stage of the filter circuit is configured to operate in a tracking mode when no transient is detected in the input signal to the first IIR filter, wherein during the tracking mode, for each input sample at the input terminal of the first IIR filter, a register of the second IIR filter is updated with a value determined by an output of the first IIR filter and by a previous output value of the second IIR filter stored in the register of the second IIR filter.

11. The filter circuit of claim 10 , wherein during the tracking mode, for each input sample at the input terminal of the first IIR filter, the register of the second IIR filter is updated with a value equal to a linear combination of the output of the first IIR filter and the previous output value of the second IIR filter.

12. A system comprising:
a microelectromechanical systems (MEMS) sensor;
a filter network comprising:
a first infinite impulse response (IIR) filter, an input terminal of the first IIR filter coupled to an output terminal of the MEMS sensor;
a third IIR filter, an output terminal of the third IIR filter coupled to an output terminal of the filter network; and
a second IIR filter coupled between the first IIR filter and the third IIR filter, wherein the first IIR filter, the second IIR filter, and the third IIR filter are first-order IIR filters, wherein the second IIR filter is configured to operate in a first mode or a second mode, wherein the filter network has a first convergence speed when the second IIR filter operates in the first mode, and the filter network has a second convergence speed slower than the first convergence speed when the second IIR filter operates in the second mode, wherein in the first mode, for each input sample of the filter network, a register of the second IIR filter is loaded with a value that is a scaled version of an output of the first IIR filter; and

a monitor circuit coupled to the filter network, wherein the monitor circuit is configured to:
detect a transient in an input signal at the input terminal of the first IIR filter; and
set the second IIR filter to operate in the first mode in response to detecting the transient.

13. The system of claim 12 , wherein the monitor circuit is further configured to set the second IIR filter to operate in the second mode when no transient in the input signal at the input terminal of the first IIR filter is detected.

14. The system of claim 12 , wherein in the second mode, for each input sample of the filter network, the register of the second IIR filter is updated with a value determined by an output of the first IIR filter and by a previous output of the second IIR filter.

15. The system of claim 12 , wherein in the first mode, the register of the second IIR filter is loaded with the value that is a scaled version of an output of the first IIR filter only once.

16. The system of claim 15 , wherein the register of the second IIR filter is loaded with the value at the end of the first mode, before the second IIR filter is switched from the first mode to the second mode.

17. The system of claim 12 , wherein the monitoring circuit is configured to detect the transient by:
computing a difference between an output of the third IIR filter and a scaled version of an output of the first IIR filter; and
declaring detection of the transient when the computed difference is larger than a pre-determined threshold.

18. The system of claim 17 , wherein the scaled version of the output of the first IIR filter is a value equal to the output of the first IIR filter multiplied with a combined DC gain, wherein the combined DC gain is equal to a multiplication of DC gains of all filters disposed between the first IIR filter and an output terminal of the third IIR

Assignees

• Infineon Technologies Ag

Inventors

• Popescu-Stroe Victor
• Mocanu Dan-Alexandru

Classifications

• H03H2017/0244

  Measures to reduce settling time · CPC title

• H03H17/0288 Primary

  Recursive, non-recursive, ladder, lattice structures · CPC title

• H03H17/04 Primary

  Recursive filters · CPC title

• H03H17/0292

  Time multiplexed filters; Time sharing filters · CPC title