Low power foveated rendering to save power on GPU and/or display

US11164352B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11164352-B2
Application numberUS-201715493636-A
CountryUS
Kind codeB2
Filing dateApr 21, 2017
Priority dateApr 21, 2017
Publication dateNov 2, 2021
Grant dateNov 2, 2021

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  5. First independent claim

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Abstract

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Methods and apparatus relating to techniques for provision of low power foveated rendering to save power on GPU (Graphics Processing Unit) and/or display are described. In various embodiment, brightness/contrast, color intensity, and/or compression ratio applied to pixels in a fovea region are different than those applied in regions surrounding the fovea region. Other embodiments are also disclosed and claimed.

First claim

Opening claim text (preview).

The invention claimed is: 1. An apparatus comprising: logic, at least a portion of which is in hardware, to cause rendering operations in a fovea region in accordance with a first contrast level and rendering operations in one or more regions surrounding the fovea region in accordance with a second contrast level, wherein the first contrast level is to be higher than the second contrast level, wherein the logic is to apply a proportional reduction to pixel brightness based on both a programmable factor and a distance from the fovea region, wherein the programmable factor is to be applied to a luma component of Luminance-Bandwidth-Chrominance (YUV) components after transformation of Red-Green-Blue (RGB) components to the YUV components for displayable render targets. 2. The apparatus of claim 1 , wherein the rendering operations in the one or more regions are to increasingly have a lower brightness and/or contrast level for regions farther away from the fovea region. 3. The apparatus of claim 1 , wherein the rendering operations in the one or more regions are to increasingly have a lower brightness and/or contrast level for regions farther away from the fovea region based on a programmable factor. 4. The apparatus of claim 1 , wherein rendering operations in the fovea region are to be performed in Red-Green-Blue (RGB) color space. 5. The apparatus of claim 1 , wherein rendering operations in the one or more regions are to be performed in Luminance-Bandwidth-Chrominance (YUV) color space. 6. The apparatus of claim 5 , wherein precision of a Y component of the YUV color space is to be reduced outside of the fovea region. 7. The apparatus of claim 1 , wherein Automatic Contrast Enhancement (ACE) is to be applied differently for pixels in the fovea region versus pixels in the one or more regions. 8. The apparatus of claim 1 , wherein a processor, having one or more processor cores, is to comprise the logic. 9. The apparatus of claim 8 , wherein the processor is to comprise a Graphics Processing Unit (GPU) having one or more graphics processing cores. 10. The apparatus of claim 1 , wherein one or more of: a processor, the logic, and memory are on a single integrated circuit die. 11. The apparatus of claim 1 , wherein the untethered HMD comprises the logic, memory, a display device, and a wireless communication device to allow the HMD to provide the longer battery life than a tethered HMD. 12. The apparatus of claim 1 , wherein the fovea region is to be determined based at least in part on tracking an eye movement, wherein a Head Mounted Display (HMD) comprises logic to track the eye movement, wherein the fovea region is to be determined based at least in part on stereoscopic rendering, wherein the HMD is to be untethered for a longer battery life. 13. The apparatus of claim 1 , wherein the logic is to employ automatic contrast enhancement based on histograms of luma values, wherein the luma values are to be generated from input pixels separately for the fovea region and non-fovea region. 14. The apparatus of claim 1 , wherein the logic is to apply the proportional reduction to the pixel brightness during performance of the rendering operations. 15. An apparatus comprising: logic, at least a portion of which is in hardware, to cause different color intensity for pixels in a fovea region versus one or more regions surrounding the fovea region, wherein pixels in the fovea region are to have a higher color intensity than pixels in the one or more regions, wherein the logic is to apply a proportional reduction to pixel brightness based on both a programmable factor and a distance from the fovea region, wherein the programmable factor is to be applied to a luma component of Luminance-Bandwidth-Chrominance (YUV) components after transformation of Red-Green-Blue (RGB) components to the YUV components for displayable render targets. 16. The apparatus of claim 15 , wherein color intensity of pixels in the one or more regions is to be increasingly lower than color intensity of pixels in regions farther away from the fovea region. 17. The apparatus of claim 15 , wherein a processor, having one or more processor cores, is to comprise the logic. 18. The apparatus of claim 17 , wherein the processor is to comprise a Graphics Processing Unit (GPU) having one or more graphics processing cores. 19. The apparatus of claim 15 , wherein one or more of: a processor, the logic, and memory are on a single integrated circuit die. 20. An apparatus comprising: logic, at least a portion of which is in hardware, to cause a first compression ratio and contrast for pixels in a fovea region of an image and a second compression ratio and contrast for pixels in one or more regions surrounding the fovea region, wherein the second compression ratio is to be lossier than the first compression ratio, wherein the logic is to apply a proportional reduction to pixel brightness based on both a programmable factor and a distance from the fovea region, wherein the programmable factor is to be applied to a luma component of Luminance-Bandwidth-Chrominance (YUV) components after transformation of Red-Green-Blue (RGB) components to the YUV components for displayable render targets. 21. The apparatus of claim 20 , wherein compression ratio for pixels in the one or more regions is to be increasingly higher than compression ratio for pixels in regions farther away from the fovea region. 22. The apparatus of claim 20 , wherein the first compression ratio is lossless and the second compression ratio is lossy. 23. The apparatus of claim 22 , wherein the second compression ratio is to comprise a plurality of lossy compression ratios. 24. The apparatus of claim 20 , wherein a processor, having one or more processor cores, is to comprise the logic. 25. The apparatus of claim 24 , wherein the processor is to comprise a Graphics Processing Unit (GPU) having one or more graphics processing cores. 26. The apparatus of claim 20 , wherein one or more of: a processor, the logic, and memory are on a single integrated circuit die. 27. One or more non-transitory computer-readable medium comprising one or more instructions that when executed on at least one processor configure the at least one processor to perform one or more operations to: cause rendering operations in a fovea region in accordance with a first contrast level and rendering operations in one or more regions surrounding the fovea region in accordance with a second contrast level, wherein the first contrast level is to be higher than the second contrast level, wherein the logic is to apply a proportional reduction to pixel brightness based on both a programmable factor and a distance from the fovea region, wherein the programmable factor is to be applied to a luma component of Luminance-Bandwidth-Chrominance (YUV) components after transformation of Red-Green-Blue (RGB) components to the YUV components for displayable render targets. 28. The non-transitory computer-readable medium of claim 27 , further comprising one or more instructions that when executed on the at least one processor configure the at least one processor to perform one or more operations to cause different color intensity for pixels in a fovea region versus one or more regions surrounding the fovea region, wherein pixels in the fovea region are to have a higher color intensity than pixels in the one or

Assignees

Inventors

Classifications

  • Texturing; Colouring; Generation of textures or colours (retouching, inpainting or scratch removal G06T5/77) · CPC title

  • involving image processing hardware · CPC title

  • Filling planar surfaces by adding surface attributes, e.g. adding colours or textures · CPC title

  • G06T11/60Primary

    Creating or editing images; Combining images with text · CPC title

  • Physics · mapped topic

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What does patent US11164352B2 cover?
Methods and apparatus relating to techniques for provision of low power foveated rendering to save power on GPU (Graphics Processing Unit) and/or display are described. In various embodiment, brightness/contrast, color intensity, and/or compression ratio applied to pixels in a fovea region are different than those applied in regions surrounding the fovea region. Other embodiments are also discl…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06T11/60. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 02 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).