Artificial intelligence hardware with synaptic reuse
US-2021103801-A1 · Apr 8, 2021 · US
US11157805B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11157805-B2 |
| Application number | US-201716464472-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 18, 2017 |
| Priority date | Nov 30, 2016 |
| Publication date | Oct 26, 2021 |
| Grant date | Oct 26, 2021 |
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A neuron circuit includes: an input terminal to which spike signals are continuously input; a first switch element that has a first end coupled to the input terminal and a second end coupled to a node, remains in a high resistance state even when a single spike signal is input, and goes into a low resistance state when spike signals are input within a time period; a feedback circuit coupled to the node, and causing the input terminal to be at a level when the first switch element goes into the low resistance state; and a second switch element that is connected in series with the first switch element between the input terminal and the node, remains in a low resistance state even when spike signals are input to the input terminal, and goes into a high resistance state when the input terminal becomes at the level.
Opening claim text (preview).
The invention claimed is: 1. A neuron circuit comprising: an input terminal to which spike signals are continuously input; a first switch element that has a first end coupled to the input terminal and a second end coupled to an intermediate node, remains in a high resistance state even when a single spike signal is input, and goes into a low resistance state, of which a resistance value is lower than that of the high resistance state, when a plurality of spike signals are input within a first time period; a feedback circuit coupled to the intermediate node, and causing the input terminal to be at a predetermined level when the first switch element goes into the low resistance state; and a second switch element that is connected in series with the first switch element between the input terminal and the intermediate node, remains in a low resistance state even when one or more spike signals are input to the input terminal, and goes into a high resistance state when the input terminal becomes at the predetermined level. 2. The neuron circuit according to claim 1 , further comprising a load connected between the intermediate node and a reference potential terminal. 3. The neuron circuit according to claim 2 , wherein the predetermined level high level. 4. The neuron circuit according to claim 1 , wherein the first switch element includes a resistor that is connected between the first end and the second end, is in a high resistance state when an internal state quantity that is an average of a voltage applied to the first end with respect to the second end within a second time period is less than a first threshold value, and is in a low resistance state when the internal state quantity is greater than a second threshold value. 5. The neuron circuit according to claim 4 , wherein the resistor is in a metallic phase at a predetermined temperature or greater and is in an insulator phase at the predetermined temperature or less, and the internal state quantity is an RMS of the voltage applied to the first end with respect to the second end within the second time period. 6. The neuron circuit according to claim 1 , wherein the first switch element includes a resistor that is connected between the first end and the second end, is in a high resistance state when an internal state quantity is less than a first threshold value, and is in a low resistance state when the internal state quantity is greater than a second threshold value, and the internal state quantity S(T 0 ) at time T 0 is S ( T 0 )=∫ 0 T 0 f ( V 10 ( T 0 −T )) e −T/τ dec dT where a voltage between the first end and the second end is represented by V 10 , an effect of V 10 on the internal state quantity is represented by F(V 10 ), and a relaxation time of the internal state quantity is represented by τ dec . 7. The neuron circuit according to claim 6 , wherein the resistor is in a metallic phase at a predetermined temperature or greater and is in an insulator phase at the predetermined temperature or less, and f(V 10 )=A×v 10 2 where A represents a constant. 8. The neuron circuit according to claim 4 , wherein the resistor is formed of vanadium oxide. 9. The neuron circuit according to claim 1 , further comprising a third switch element that is connected in series with the first switch element and the second switch element between the input terminal and the intermediate node, remains in a high resistance state even when a single spike signal is input, and goes into a low resistance state when a plurality of the spike signals are input within a third time period. 10. The neuron circuit according to claim 9 , wherein a resistance value of the high resistance state of the third switch element is higher than a resistance value of the high resistance state of the first switch element, and a resistance value of the low resistance state of the third switch element is lower than a resistance value of the high resistance state of the first switch element. 11. A system comprising: neuron circuits, each including: an input terminal to which a spike signal is continuously input, a first switch element that has a first end coupled to the input terminal and a second end coupled to an intermediate node, remains in a high resistance state even when a single spike signal is input, and goes into a low resistance state, of which a resistance value is lower than that of the high resistance state, when a plurality of spike signals are input within a first time period, a feedback circuit coupled to the intermediate node, and causing the input terminal to be at a predetermined level when the first switch element goes into the low resistance state, and a second switch element that is connected in series with the first switch element between the input terminal and the intermediate node, remains in a low resistance state even when one or more spike signals are input to the input terminal, and goes into a high resistance state when the input terminal becomes at a predetermined level; and a synaptic circuit connecting the neuron circuits. 12. A switch circuit comprising: an input terminal to which an input signal is input; an output terminal; and a switch element including: a first end coupled to the input terminal, a second end coupled to the output terminal, and a resistor that is connected between the first end and the second end, is in a high resistance state when an internal state quantity is less than a first threshold value, is in a low resistance state, of which a resistance value is less than that of the high resistance state, when the internal state quantity is greater than a second threshold value, wherein the internal state quantity S(T 0 ) at time T 0 is S ( T 0 )=∫ 0 T 0 f ( V 10 ( T 0 −T )) e −T/τ dec dT where a voltage between the first end and the second end is represented by V 10 , an effect of V 10 on an internal state quantity is represented by f(V 10 ), and a relaxation time of the internal state quantity is represented by τ dec , and a cycle period of variation in the input signal is shorter than the relaxation time. 13. The switch circuit according to claim 12 , wherein the input signal is a plurality of spike signals, and an interval of the plurality of spike signals is shorter than the relaxation time. 14. The switch circuit according to claim 12 , wherein the resistor is in a metallic phase at a predetermined temperature or greater and is in an insulator phase at the predetermined temperature or less, and f(V 10 )=A×V 10 2 where A represents a constant.
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