Low frequency and direct current signal blocking device and antenna

US11145946B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11145946-B2
Application numberUS-201916583499-A
CountryUS
Kind codeB2
Filing dateSep 26, 2019
Priority dateOct 29, 2018
Publication dateOct 12, 2021
Grant dateOct 12, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A low frequency and direct current (DC) signal blocking device includes a dielectric substrate layer; a low frequency and DC signal blocking transmission line on a first surface of the substrate layer, where the low frequency and DC signal blocking transmission line has an input end and an output end; a metal layer on a second surface of the substrate layer, where there is at least one gap on the metal layer such that the metal layer is separated into at least a first sub-region and a second sub-region, where the gap is configured to block at least one of a low frequency signal and a DC signal; the substrate layer disposed between the low frequency and DC signal blocking transmission line and the metal layer; and a metal plate, wherein a dielectric layer is disposed between the metal plate and the metal layer.

First claim

Opening claim text (preview).

That which is claimed is: 1. A low frequency and direct current (“DC”) signal blocking device, characterized in that the low frequency and DC signal blocking device comprises: a dielectric substrate layer; a low frequency and DC signal blocking transmission line on a first surface of the dielectric substrate layer, wherein the low frequency and DC signal blocking transmission line has an input end and an output end; a metal layer on a second surface of the dielectric substrate layer, wherein the dielectric substrate layer is disposed between the low frequency and DC signal blocking transmission line and the metal layer, wherein there is at least one gap in the metal layer such that the metal layer is separated into at least a first sub-region and a second sub-region that is spaced apart from the first sub-region by the at least one gap, wherein the at least one gap is configured to block at least one of a low frequency signal and a DC signal and not block radio frequency (“RF”) signals; and a metal plate, wherein a dielectric layer is disposed between the metal plate and the metal layer, wherein the first sub-region and the second sub-region form two electrodes of a first capacitor. 2. The low frequency and DC signal blocking device according to claim 1 , wherein the dielectric layer includes a solder mask layer and/or air. 3. The low frequency and DC signal blocking device according to claim 1 , wherein the input end is configured to be connected to a first cable upstream of the low frequency and DC signal blocking device, and the output end is configured to be connected to a second cable downstream of the low frequency and DC signal blocking device. 4. The low frequency and DC signal blocking device according to claim 3 , wherein the input end is connected to an inner conductor of the first cable, and the output end is connected to an inner conductor of the second cable. 5. The low frequency and DC signal blocking device according to claim 3 , wherein the first sub-region is connected to an outer conductor of the first cable, and the second sub-region is connected to an outer conductor of the second cable. 6. The low frequency and DC signal blocking device according to claim 1 , wherein the metal plate is a reflector of an antenna. 7. The low frequency and DC signal blocking device according to claim 2 , wherein the metal plate is connected to the metal layer only via the solder mask layer. 8. The low frequency and DC signal blocking device according to claim 1 , wherein the low frequency and DC signal blocking transmission line is configured in a straight line shape or an L shape. 9. The low frequency and DC signal blocking device according to claim 1 , wherein the low frequency and DC signal blocking transmission line is configured in a T-shape, wherein the low frequency and DC signal blocking transmission line has one input end and two output ends. 10. The low frequency and DC signal blocking device according to claim 1 , wherein the at least one gap is completely or partially filled with solid dielectric materials. 11. The low frequency and DC signal blocking device according to claim 1 , wherein the area of the second sub-region, the thickness of the metal layer and/or the width of the at least one gap are adapted to a frequency range of the radio frequency signals. 12. The low frequency and DC signal blocking device according to claim 11 , wherein a thickness of the metal layer is between 0.02 mm and 0.3 mm and a width of the at least one gap is between 0.01 mm and 1 mm. 13. The low frequency and DC signal blocking device according to claim 1 , wherein the at least one gap is configured to allow the RF signals to capacitively couple from the first sub-region to the second sub-region. 14. The low frequency and DC signal blocking device according to claim 13 , wherein the first sub-region, the metal plate and the dielectric layer form a second capacitor and the second sub-region, the metal plate and the dielectric layer form a third capacitor, wherein the second and third capacitors are configured to allow the RF signals to capacitively couple from the first sub-region to the second sub-region. 15. A low frequency and direct current (“DC”) signal blocking device, characterized in that the low frequency and DC signal blocking device comprises: a dielectric substrate layer; a low frequency and DC signal blocking transmission line on a first surface of the dielectric substrate layer, wherein the low frequency and DC signal blocking transmission line has an input end that is configured to be connected to a first cable and an output end that is configured to be connected to a second cable, the low frequency and DC signal blocking transmission line extending continuously from the input end to the output end; a metal layer on a second surface of the dielectric substrate layer, wherein the dielectric substrate layer is between the low frequency and DC signal blocking transmission line and the metal layer, wherein a gap in the metal layer divides the metal layer into at least a first sub-region and a second sub-region that is not connected to the first sub-region, wherein the first sub-region and the second sub-region form two electrodes of a first capacitor. 16. The low frequency and DC signal blocking device according to claim 15 , further comprising a solder mask layer on the metal layer and a metal plate, where the solder mask layer is between the metal plate and the metal layer. 17. The low frequency and DC signal blocking device according to claim 16 , wherein the gap is configured to allow radio frequency (“RF”) signals to capacitively couple from the first sub-region to the second sub-region. 18. The low frequency and DC signal blocking device according to claim 17 , wherein the first sub-region, the metal plate and the dielectric layer form a second capacitor and the second sub-region, the metal plate and the dielectric layer form a third capacitor, wherein the second and third capacitors are configured to allow the RF signals to capacitively couple from the first sub-region to the second sub-region. 19. The low frequency and DC signal blocking device according to claim 18 , wherein the metal plate is a reflector of an antenna.

Assignees

Inventors

Classifications

  • H01P1/203Primary

    Strip line filters · CPC title

  • Reflecting surfaces; Equivalent structures {(electromagnetic shields H01Q1/526)} · CPC title

  • Structural association of antennas with earthing switches, lead-in devices or lightning protectors · CPC title

  • Selective devices used as spatial filter or angular sidelobe filter · CPC title

  • H01P1/2007Primary

    Filtering devices for biasing networks or DC returns · CPC title

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What does patent US11145946B2 cover?
A low frequency and direct current (DC) signal blocking device includes a dielectric substrate layer; a low frequency and DC signal blocking transmission line on a first surface of the substrate layer, where the low frequency and DC signal blocking transmission line has an input end and an output end; a metal layer on a second surface of the substrate layer, where there is at least one gap on t…
Who is the assignee on this patent?
Commscope Technologies Llc
What technology area does this patent fall under?
Primary CPC classification H01P1/203. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 12 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).