Liquid crystal display panel and manufacturing method thereof
US-2019129220-A1 · May 2, 2019 · US
US11145680B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11145680-B2 |
| Application number | US-201916707218-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 9, 2019 |
| Priority date | Dec 20, 2018 |
| Publication date | Oct 12, 2021 |
| Grant date | Oct 12, 2021 |
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A display panel and a display device including the display panel are discussed. The display panel includes a substrate having an active area, and a non-active area surrounding the active area and having a first area, a second area and a third area which are spaced apart from one another, at least one signal line disposed in each of the first, second and third areas, at least one connection pattern disposed on the at least one signal line, and a sealant disposed in the non-active area. In at least one of the first, second and third areas of the non-active area of the display panel and display device, i) at least one signal line and at least one connection pattern overlap each other, and ii) at least one signal line includes an area in the form of a mesh with at least one opening.
Opening claim text (preview).
What is claimed is: 1. A display device comprising: a panel comprising: a substrate comprising an active area, and a non-active area surrounding the active area and comprising a first area, a second area and a third area which are spaced apart from one another; at least one signal line disposed in each of the first, second and third areas; and a sealant disposed in the non-active area, wherein the display device further comprises a plurality of connection patterns disposed over the at least one signal line, wherein in the at least one of the first, second and third areas, the at least one signal line and the plurality of connection patterns overlap each other, and the at least one signal line comprises an area in a form of a mesh with at least one opening, wherein the plurality of connection patterns do not overlap all or a part of the at least one opening, wherein the sealant overlaps the at least one of the first, second and third areas, wherein at least one gate driving circuit is disposed in the third area, at least some of the plurality of connection patterns are connected to at least one connection pattern extension line, wherein the at least one connection pattern extension line is connected to at least one transistor of the gate driving circuit, wherein the plurality of connection patterns are arranged in an island shape, and wherein each connection pattern among the plurality of connection patterns is disposed on an intersection of a signal line disposed in a first direction and another signal line disposed in a second direction crossing the first direction. 2. The display device according to claim 1 , wherein in the first area, an area in which the at least one signal line has the at least one opening further comprises at least one active layer overlapping a part of the at least one signal line. 3. The display device according to claim 2 , wherein a first connection pattern and a second connection pattern are disposed on the at least one active layer, and each of the first and second connection patterns is electrically connected to the at least one active layer. 4. The display device according to claim 3 , wherein the first and second connection patterns are disposed to be spaced apart from each other, and each of the first and second connection patterns is connected to a plurality of data lines arranged in the active area. 5. The display device according to claim 1 , wherein in the second area, the at least one connection pattern has an opening at a location corresponding to the least one opening of the at least one signal line. 6. The display device according to claim 5 , wherein at least one insulating film is disposed between the at least one connection pattern and the at least one signal line disposed in the second area, and the at least one connection pattern is electrically connected to the least one signal line through at least one hole formed in the at least one insulating film. 7. The display device according to claim 5 , wherein the at least one connection pattern disposed in the second area is electrically connected to a common line disposed in the active area. 8. The display device according to claim 5 , wherein the at least one signal line disposed in the second area is electrically connected to a circuit film connected to the non-active area of the panel. 9. The display device according to claim 1 , wherein at least one insulating film is disposed between the plurality of connection patterns and the at least one signal line, and in an area in which the plurality of connection patterns and the at least one signal line overlap each other, each of the plurality of connection patterns is electrically connected to the least one signal line through at least one hole formed in the at least one insulating film. 10. The display device according to claim 1 , wherein the sealant overlaps the at least one opening of the at least one signal line. 11. The display device according to claim 1 , wherein the first area is closer to the active area than the second area, and the second area is closer to the active area than the third area. 12. A display panel comprising: a first substrate comprising an active area, and a non-active area surrounding the active area and comprising a first area, a second area and a third area which are spaced apart from one another; at least one signal line disposed in each of the first, second and third areas; a plurality of connection patterns disposed over the at least one signal line; a second substrate facing the first substrate; and a sealant disposed between the first substrate and the second substrate, and disposed in the non-active area, wherein in the at least one of the first, second and third areas, the at least one signal line and the plurality of connection patterns overlap each other, and the at least one signal line comprises an area in a form of a mesh with at least one opening, wherein the plurality of connection patterns do not overlap all or a part of the at least one opening, wherein at least one gate driving circuit is disposed in the third area, at least some of the plurality of connection patterns are connected to at least one connection pattern extension line, wherein the at least one connection pattern extension line is connected to at least one transistor of the gate driving circuit, wherein the plurality of connection patterns are arranged in an island shape, and wherein each connection pattern among the plurality of connection patterns is disposed on an intersection of a signal line disposed in a first direction and another signal line disposed in a second direction crossing the first direction.
Interconnections, e.g. scanning lines · CPC title
wherein the TFTs are in active matrices · CPC title
Gaskets; Spacers; Sealing of cells · CPC title
Wiring, e.g. gate line, drain line · CPC title
Electricity · mapped topic
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