Transmission apparatus and method for supporting flexible ethernet MAC ports

US11140004B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11140004-B2
Application numberUS-201816026712-A
CountryUS
Kind codeB2
Filing dateJul 3, 2018
Priority dateMar 21, 2013
Publication dateOct 5, 2021
Grant dateOct 5, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments of the present invention provide a transmission apparatus, a connection device, and a method, where the apparatus includes N Ethernet Medium Access Control MAC ports, where each Ethernet MAC port is corresponding to a first MII interface, K Ethernet physical layer interfaces, where each Ethernet physical layer interface is corresponding to a second MII interface, and a connection device, where both N and K are positive integers; where the connection device is configured to control a time-division interconnect bus in the connection device or a time-division space-division switching matrix in the connection device to implement a connection between a timeslot of the first MII interface and a timeslot of the second MII interface, where the N Ethernet MAC ports and the K Ethernet physical layer interfaces are separately connected to the connection device by using the first MII interfaces and the second MII interfaces.

First claim

Opening claim text (preview).

What is claimed is: 1. A transmission apparatus comprising: N Ethernet Medium Access Control (MAC) ports, each Ethernet MAC port corresponding to a first interface; K Ethernet physical layer interfaces, each Ethernet physical layer interface corresponding to a second interface; and a connection device, wherein both N and K are positive integers, wherein at least one of N or K is greater than 1, wherein the connection device is configured to implement a connection between a timeslot of the first interface and a timeslot of the second interface; wherein the N Ethernet MAC ports are separately connected to the connection device by using the corresponding first interfaces, and the K Ethernet physical layer interfaces are separately connected to the connection device by using the corresponding second interfaces, wherein the connection device connects the N Ethernet MAC ports and the K Ethernet physical layer interfaces by using the first interfaces and the second interfaces. 2. The apparatus according to claim 1 , wherein the connection device is further configured to allocate some or all timeslots of P timeslots obtained by division to some or all ports of the N Ethernet MAC ports, wherein P is a positive integer. 3. The apparatus according to claim 2 , wherein one interface of the K Ethernet physical layer interfaces has J virtual channels, or multiple interfaces of the K Ethernet physical layer interfaces have J virtual channels; and the connection device is further configured to map some or all timeslots of the P timeslots to the J virtual channels, wherein each virtual channel is used to provide bandwidth by using the second interface, and J is a positive integer. 4. The apparatus according to claim 2 , wherein the connection device is further configured to mark some or all timeslots of the P timeslots. 5. The apparatus according to claim 1 , wherein the connection device is further configured to extend a bit width or increase a clock rate for any MAC port of the N Ethernet MAC ports. 6. The apparatus according to claim 1 , wherein the connection device is further configured to implement data transmission between N1 Ethernet MAC ports and K1 Ethernet physical layer interfaces by using the connection between the timeslot of the first interface and the timeslot of the second interface, wherein the N Ethernet MAC ports comprise the N1 Ethernet MAC ports, N1 is a positive integer and N1≤N, the K Ethernet physical layer interfaces comprise the K1 Ethernet physical layer interfaces, and K1 is a positive integer and K1≤K. 7. The apparatus according to claim 6 , wherein the connection device is further configured to implement uplink data transmission in a direction from the K1 Ethernet physical layer interfaces to the N1 Ethernet MAC ports by using the connection between the timeslot of the first interface and the timeslot of the second interface; or the connection device is further configured to implement downlink data transmission in a direction from the N1 Ethernet MAC ports to the K1 Ethernet physical layer interfaces by using the connection between the timeslot of the first interface and the timeslot of the second interface. 8. The apparatus according to claim 7 , wherein when the connection device is configured to control a time-division interconnect bus in the connection device, the connection device is further configured to control the time-division interconnect bus to converge the downlink data borne in the timeslots of the first interfaces, so that the converged downlink data is borne in the timeslot of the second interface by using the connection between the timeslot of the first interface and the timeslot of the second interface, and the converged downlink data borne in the timeslot of the second interface is sent to the K1 Ethernet physical layer interfaces, and the K1 Ethernet physical layer interfaces are configured to encode the converged downlink data and transmit encoded downlink data to a physical transmission channel, and when the connection device is configured to control a time-division space-division switching matrix in the connection device, the connection device is further configured to control the time-division space-division switching matrix to converge the downlink data borne in the timeslots of the first interfaces, so that the converged downlink data is borne in the timeslot of the second interface by using the connection between the timeslot of the first interface and the timeslot of the second interface, and the converged downlink data borne in the timeslot of the second interface is sent to the K1 Ethernet physical layer interfaces, and the K1 Ethernet physical layer interfaces are configured to encode the converged downlink data and transmit encoded downlink data to a physical transmission channel. 9. The apparatus according to claim 7 , wherein the K1 Ethernet physical layer interfaces are configured to receive encoded uplink data from a physical transmission channel, decode the encoded uplink data, and send decoded uplink data to the connection device; and when the connection device is configured to control a time-division interconnect bus in the connection device, the connection device is further configured to control the time-division interconnect bus so that the decoded uplink data is borne in a corresponding timeslot of the second interface, the decoded uplink data is borne in the timeslot of the first interface by using the connection between the timeslot of the first interface and the timeslot of the second interface, and the decoded uplink data borne in the timeslot of the first interface is sent to the N1 Ethernet MAC ports, and when the connection device is configured to control a time-division space-division switching matrix in the connection device, the connection device is further configured to control the time-division space-division switching matrix so that the decoded uplink data is borne in a corresponding timeslot of the second interface, the decoded uplink data is borne in the timeslot of the first interface by using the connection between the timeslot of the first interface and the timeslot of the second interface, and the decoded uplink data borne in the timeslot of the first interface is sent to the N1 Ethernet MAC ports. 10. The apparatus according to claim 1 , wherein the connection device is further configured to disable some or all Ethernet physical layer interfaces of the K Ethernet physical layer interfaces. 11. A data transmission method, comprising: implementing, by a connection device, data transmission between N1 Ethernet Medium Access Control (MAC) ports of N Ethernet MAC ports and K1 Ethernet physical layer interfaces of K Ethernet physical layer interfaces by using a connection between a timeslot of a first interface and a timeslot of a second interface, wherein the connection between the timeslot of the first interface and the timeslot of the second interface is implemented by the connection device, N and N1 are positive integers and N1≤N, both K and K1 are positive integers and K1≤K, wherein at least one of N1 or K1 is greater than 1, the N Ethernet MAC ports are separately connected to the connection device by using the corresponding first interfaces, the K Ethernet physical layer interfaces are separately connected to the connection device by using the corresponding second interfaces, and the connection device connects the N Ethernet MAC ports and the K Ethernet physical layer interfaces by using the first interfaces and the second interfaces. 12. The method according to claim 11 , wherein the implementing, by a connection device, data transmission between N1 Etherne

Assignees

Inventors

Classifications

  • H04L49/351Primary

    for local area network [LAN], e.g. Ethernet switches · CPC title

  • Time-space-time switching · CPC title

  • Allocation of channels in TDM/TDMA networks, e.g. distributed multiplexers (Passive Optical Networks H04Q11/0062) · CPC title

  • LAN, internet · CPC title

  • H04L12/403Primary

    with centralised control, e.g. polling · CPC title

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What does patent US11140004B2 cover?
Embodiments of the present invention provide a transmission apparatus, a connection device, and a method, where the apparatus includes N Ethernet Medium Access Control MAC ports, where each Ethernet MAC port is corresponding to a first MII interface, K Ethernet physical layer interfaces, where each Ethernet physical layer interface is corresponding to a second MII interface, and a connection de…
Who is the assignee on this patent?
Huawei Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification H04L49/351. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 05 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).