Flip-chip package substrate and method for preparing the same

Patent metadata

Field	Value
Publication number	US-11139230-B2
Application number	US-201916542569-A
Country	US
Kind code	B2
Filing date	Aug 16, 2019
Priority date	Aug 24, 2018
Publication date	Oct 5, 2021
Grant date	Oct 5, 2021

Abstract

A flip-chip package substrate and a method for preparing the same in accordance with the present disclosure includes stacking a reinforcement layer on two opposing sides of a middle layer in order to increase the rigidity of the flip-chip package substrate, and promoting a thin middle layer, wherein the sizes of the end faces of conductive portions can be minimized according to needs. This increases the number of electrical contacts possible in a unit area and enables the creation of finer line pitch and higher layout density of the circuit portions, thereby satisfying the need for packaging of high integration/large scale chips while preventing warpage from occurring in the electronic packages.

First claim

What is claimed is:

1. A flip-chip package substrate, comprising:
a middle layer including a first side and a second side opposing the first side, wherein the middle layer is made by an insulating material;
a plurality of first conductive pillars provided in and penetrating the middle layer, each of the first conductive pillars having two opposing ends flush with and exposed from the first side and the second side of the middle layer, respectively;
a plurality of reinforcement layers bonded to the first side and the second side of the middle layer, a plurality of openings being formed in the reinforcement layers at places corresponding to where the first conductive pillars are provided in the middle layer, wherein the middle layer and the reinforcement layers form a core structure;
a plurality of insulating portions provided on the first side and the second side of the middle layer, each of the insulating portions including a first insulating layer and a second insulating layer, the reinforcement layers being bonded to the first side and the second side via a respective one of the first insulating layers, and the reinforcement layers and the openings being covered by a respective one of the second insulating layers;
a plurality of second conductive pillars provided in the openings, each of the second conductive pillars having one end in direct contact with the end of one of the first conductive pillars and the other end exposed from a surface of a respective one of the insulating portions, wherein the first conductive pillars and the second conductive pillars form conductive portions, and the insulating portions are between the second conductive pillars and the reinforcement layers; and
a circuit portion formed on the insulating portions and electrically connected with the second conductive pillars of the conductive portions.

2. The flip-chip package substrate of claim 1 , wherein the first conductive pillars in the middle layer are formed from single pillars.

3. The flip-chip package substrate of claim 1 , wherein the first conductive pillars in the middle layer are formed by stacking a plurality of pillars on one another, and the stacked pillars have end faces of the same or different sizes.

4. The flip-chip package substrate of claim 1 , wherein the reinforcement layers are made by electrically conductive materials or electrically insulating materials.

5. A method for preparing a flip-chip package substrate, comprising:
providing an insulating middle layer including a first side and a second side opposing the first side, a plurality of first conductive pillars provided in and penetrating the insulating middle layer, each of the first conductive pillars having two opposite ends exposed from the first side and the second side of the insulating middle layer, respectively;
bonding a reinforcement layer to each of the first side and the second side of the middle layer via a respective one of the first insulating layers;
forming a plurality of openings in the reinforcement layers at places corresponding to where the first conductive pillars are provided in the insulating middle layer;
forming a respective one of the second insulating layers on the reinforcement layers and in the openings, wherein the first insulating layers and the second insulating layers form insulating portions covering the reinforcement layers;
forming second conductive pillars in the insulating portions at places corresponding to where the openings are formed in the reinforcement layers, each of the second conductive pillars having one end connected to one of the first conductive pillars and the other end exposed from a surface of a respective one of the insulating portions, such that the first conductive pillars and the second conductive pillars form conductive portions; and
forming on the insulating portions a circuit portion electrically connected with the second conductive pillars of the conductive portions.

6. The method of claim 5 , wherein the first conductive pillars provided in the middle layer are formed from a single pillar.

7. The method of claim 5 , wherein the first conductive pillars provided in the middle layer are formed from stacking a plurality of pillars on one another, and the stacked pillars have end faces of the same or different sizes.

8. The method of claim 5 , wherein at least one of the first conductive pillars and the second conductive pillars is formed by electroplating, deposition or filling of a conductive material.

9. The method of claim 5 , wherein the reinforcement layers are made of electrically conductive materials or electrically insulating materials.

10. A method for preparing a flip-chip package substrate, comprising:
providing a conductive middle layer including a first side and a second side opposing the first side, with the second side of the middle layer bonded to a reinforcement layer via a first insulating layer;
forming a plurality of annular openings in the middle layer to delineate first conductive pillars;
bonding another reinforcement layer to the first side of the middle layer via another first insulating layer, and the another first insulating layer being filled into the openings for insulating the middle layer from the first conductive pillars;
forming a plurality of openings in the reinforcement layers at places corresponding to where the first conductive pillars are provided on the middle layer;
forming second insulating layers on the reinforcement layers and in the openings, wherein the first insulating layers and the second insulating layers form insulating portions covering the reinforcement layers;
forming second conductive pillars in the insulating portions at places corresponding to where the openings are formed in the reinforcement layers, wherein each of the second conductive pillars has one end connected to one of the first conductive pillars and the other end exposed from a surface of a respective one of the insulating portions, such that the first conductive pillars and the second conductive pillars form conductive portions; and
forming on the insulating portions a circuit portion electrically connected with the second conductive pillars of the conductive portions.

11. The method of claim 10 , wherein the reinforcement layers are made of electrically conductive materials or electrically insulating materials.

12. The method of claim 10 , wherein the second conductive pillars are formed by electroplating, deposition or filling of a conductive material.

13. A flip-chip package substrate, comprising:
a middle layer including a first side and a second side opposing the first side, wherein the middle layer is made of an electrically conductive material;
a plurality of first conductive pillars provided in and penetrating the middle layer, each of the first conductive pillars having two opposing ends exposed from the first side and the second side of the middle layer, respectively, wherein annular openings are formed between the middle layer and the first conductive pillars and electrically insulated from one another;
a plurality of reinforcement layers bonded to the first side and the second side of the middle layer, a plurality of openings being formed in the reinforcement layers at places corresponding to where the first conductive pillars are provided in the middle layer, wherein the middle layer and the reinforcement layers form a core structure;
a plurality of insulating portions provided on the first side and the second side of the middle layer, each of the insulating portions including a first insulating layer and a second insulating layer, the reinforcement layers being bonded to the first side and the second

Assignees

• Phoenix Pioneer Technology Co Ltd

Inventors

• Chou Pao-Hung
• Yu Chun-Hsien
• Hsu Shih-Ping

Classifications

• H10W99/00

  Subject matter not provided for in other groups of this subclass · CPC title

• H10W70/685

  comprising multiple insulating layers · CPC title

• H10W70/095

  of vias therein · CPC title

• H10W70/05

  of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04) · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title