Display device

Patent metadata

Field	Value
Publication number	US-11131894-B2
Application number	US-202016916041-A
Country	US
Kind code	B2
Filing date	Jun 29, 2020
Priority date	Dec 4, 2019
Publication date	Sep 28, 2021
Grant date	Sep 28, 2021

Abstract

A display device is provided. The display device includes an internal driving circuit, an external circuit and a plurality of signal lines. The signal lines are electrically connected with the internal driving circuit and the external circuit. Each signal line includes N signal line sections, Ma first turning points and Mb second turning points, wherein the N signal line sections are connected with each other, each of the Ma first turning points and the Mb second turning points is located at the connecting site of the two adjacent signal line sections, N and Ma are positive integers, Mb is 0 or a positive integer, N≥3, Ma≥2, Ma+Mb≤N−1, the resistance change rate between the two adjacent signal line sections connected with each first turning point is ΔR, and 0<|ΔR|≤10%.

First claim

What is claimed is:

1. A display device having a display area and a peripheral area, the peripheral area being located at at least one side of the display area and including an internal driving circuit area and a wiring area, wherein the display device includes:
a pixel array disposed in the display area;
an internal driving circuit disposed in the internal driving circuit area and electrically connected with the pixel array; and
a plurality of signal lines disposed in the wiring area, and the electrically connected with the internal driving circuit and an external circuit,
wherein each of the signal lines includes N signal line segments, Ma first turning points and Mb second turning points, the N signal line segments are connected with each other, each of the Ma first turning points and the Mb second turning points is located at a connecting site of two adjacent signal line segments, wherein N and Ma are positive integers, Mb is a positive integer or 0, N≥3, Ma≥2, Ma+Mb≤N−1, and a resistance change rate between two adjacent signal line segments connected with each first turning point is ΔR, 0<|ΔR|≤10%.

2. The display device according to claim 1 , wherein end points disposed opposite each other in the signal line segment with a largest resistance value among the N signal line segments are the first turning points.

3. The display device according to claim 1 , wherein the Ma first turning points are continuously provided in each of the signal lines.

4. The display device according to claim 1 , wherein the Ma first turning points are discontinuously provided in each of the signal lines.

5. The display device according to claim 1 , wherein Mb=0 and Ma+Mb=N−1.

6. A display device having a display area and a peripheral area, the peripheral area being located at at least one side of the display area and including an internal driving circuit area and a wiring area, wherein the display device includes:
a pixel array disposed in the display area;
an internal driving circuit disposed in the internal driving circuit area and electrically connected with the pixel array; and
a plurality of signal lines disposed in the wiring area, and electrically connected with the internal driving circuit and an external circuit,
wherein each of the signal lines includes N signal line segments, Ma first turning points and Mb second turning points, the N signal line segments are connected with each other, each of the Ma first turning points and the Mb second turning points is located at a connecting site of two adjacent signal line segments, wherein N and Ma are positive integers, Mb is a positive integer or 0, N≥3, Ma≥2, Ma+Mb≤N−1, and a width change rate between two adjacent signal line segments connected with each first turning point is ΔW, 0<|ΔW|≤10%.

7. The display device according to claim 6 , wherein end points disposed opposite each other in the signal line segment with a smallest width among the N signal line segments are the first turning points.

8. The display device according to claim 6 , wherein the Ma first turning points are continuously provided in each of the signal lines.

9. The display device according to claim 6 , wherein the Ma first turning points are discontinuously provided in each of the signal lines.

10. The display device according to claim 6 , wherein Mb=0 and Ma+Mb=N−1.

Assignees

• Au Optronics Corp

Inventors

• Chang Chin-Hao
• Lin Wei-Li

Classifications

• G02F1/136286 Primary

  Wiring, e.g. gate line, drain line · CPC title

• G02F1/13454 Primary

  Drivers integrated on the active matrix substrate (G02F1/136277 takes precedence) · CPC title

• G02F1/13452

  Conductors connecting driver circuitry and terminals of panels · CPC title

• G09G3/20 Primary

  for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title

• H01L27/3276

  Electricity · mapped topic