Reverse charging device, and method and device for regulating reverse charging current

Patent metadata

Field	Value
Publication number	US-11128148-B2
Application number	US-201816233472-A
Country	US
Kind code	B2
Filing date	Dec 27, 2018
Priority date	Jul 17, 2018
Publication date	Sep 21, 2021
Grant date	Sep 21, 2021

Abstract

A reverse charging device includes a processor, a standard downstream port (SDP) and a first link on which a charging downstream port (CDP) interface chip is arranged. When it is detected that an adapter is plugged into the SDP, the processor is connected with the SDP through the first link, and the processor, the CDP interface chip, and the SDP form a CDP to perform reverse charging through the CDP and the adapter, wherein the CDP has a current transmission capability higher than the SDP.

First claim

What is claimed is:

1. A reverse charging device, comprising:
a processor;
a standard downstream port (SDP);
a first link on which a charging downstream port (CDP) interface chip is arranged, wherein when it is detected that an adapter is plugged into the SDP, the processor is connected with the SDP through the first link, and the processor, the CDP interface chip, and the SDP form a CDP to perform reverse charging through the CDP and the adapter, the CDP having a current transmission capability higher than the SDP; and
a second link different from the first link, wherein the processor is connected with the SDP through the second link to perform forward charging based on an established connection.

2. The device of claim 1 , further comprising a control Integrated Circuit (IC),
wherein during reverse charging, the control IC is configured to control a current value of a reverse charging current; and
wherein during forward charging, the control IC is configured to control a current value of a forward charging current.

3. The device of claim 1 , further comprising a parasitic diode,
wherein during forward charging or reverse charging, the device reversely biases and turns off the parasitic diode by providing a preset voltage for the CDP interface chip.

4. A method for regulating a reverse charging current, applied to a first terminal device, the method comprising:
acquiring a total current value in a process of reversely charging a second terminal device through an adapter, the total current value including a reverse charging current value and a value of current consumed by one or more application programs running on the first terminal device;
comparing the total current value with a rated current value of a battery of the first terminal; and
when the total current value is kept higher than the rated current value for a preset time period, decreasing the reverse charging current value.

5. The method of claim 4 , wherein decreasing the reverse charging current value when the total current value is kept higher than the rated current value for the preset time period comprises:
when the total current value is kept higher than the rated current value for a first preset time period, decreasing the reverse charging current value from a first current value to a second current value, the first current value being an initial current value for reverse charging of the second terminal device and the first current value being higher than the second current value.

6. The method of claim 5 , after decreasing the reverse charging current value from the first current value to the second current value, further comprising:
when the total current value is kept higher than the rated current value for a second preset time period, decreasing the reverse charging current value from the second current value to a third current value, the second current value being higher than the third current value.

7. The method of claim 6 , after decreasing the reverse charging current value from the second current value to the third current value, further comprising:
when the total current value is kept higher than the rated current value in for third preset time period, stopping reversely charging the second terminal device.

8. The method of claim 4 , after decreasing the reverse charging current value, further comprising:
when it is detected that the total current value is kept lower than a specified current value for a fourth preset time period, reversely charging the second terminal device with the first current value, the first current value being an initial current value for reverse charging of the second terminal device.

9. The method of claim 4 , after decreasing the reverse charging current value, further comprising:
when a plugging and unplugging operation on the adapter is detected, reversely charging the second terminal device with the first current value, the first current value being an initial current value for reverse charging of the second terminal device.

10. A first terminal device, comprising:
a processor; and
a memory configured to store an instruction executable by the processor,
wherein the processor is configured to:
acquire a total current value in a process of reversely charging a second terminal device through an adapter, the total current value including a reverse charging current value and a value of current consumed by one or more application programs running on the first terminal device;
compare the total current value with a rated current value of a battery of the first terminal; and
when the total current value is kept higher than the rated current value in a preset time period, decrease the reverse charging current value.

11. The first terminal of claim 10 , wherein the processor is configured to:
when the total current value is kept higher than the rated current value for a first preset time period, decrease the reverse charging current value from a first current value to a second current value, the first current value being an initial current value for reverse charging of the second terminal device and the first current value being higher than the second current value.

12. The first terminal of claim 11 , wherein after decreasing the reverse charging current value from the first current value to the second current value, the processor is further configured to:
when the total current value is kept higher than the rated current value for a second preset time period, decrease the reverse charging current value from the second current value to a third current value, the second current value being higher than the third current value.

13. The first terminal of claim 12 , wherein after decreasing the reverse charging current value from the second current value to the third current value, the processor is further configured to:
when the total current value is kept higher than the rated current value for a third preset time period, stop reversely charging the second terminal device.

14. The first terminal of claim 10 , wherein after decreasing the reverse charging current value, the processor is further configured to:
when it is detected that the total current value is kept lower than a specified current value for a fourth preset time period, reversely charge the second terminal device with the first current value, the first current value being an initial current value for reverse charging of the second terminal device.

15. The first terminal of claim 10 , wherein after decreasing the reverse charging current value, the processor is further configured to:
when a plugging and unplugging operation on the adapter is detected, reversely charge the second terminal device with the first current value, the first current value being an initial current value for reverse charging of the second terminal device.

Assignees

• Beijing Xiaomi Mobile Software Co Ltd

Inventors

• Jiang Fei
• Qian Ping
• Xiong Xin

Classifications

• H02J7/751

  concerning the insertion or the connection of the batteries · CPC title

• H02J7/94

  in response to battery current · CPC title

• H02J7/63

  against overdischarge · CPC title

• H02J7/685

  using connection detecting circuits (H02J7/68 takes precedence) · CPC title

• H02J7/875

  Charging or discharging for charge maintenance, battery initiation or rejuvenation · CPC title