Data processing systems

Patent metadata

Field	Value
Publication number	US-11127110-B2
Application number	US-201715446997-A
Country	US
Kind code	B2
Filing date	Mar 1, 2017
Priority date	Mar 1, 2017
Publication date	Sep 21, 2021
Grant date	Sep 21, 2021

Abstract

A display controller 93 in a data processing system includes a timewarp module (transformation circuitry) 100 that is operable to perform timewarp processing of a rendered frame 92 generated by a graphics processor (GPU) 91 for provision to a display panel 94. The timewarp module (transformation circuitry) 100 operates to transform an input surface 92 read by the display controller 93 based on received view orientation data to provide an appropriately “timewarped” transformed version of the input surface as an output transformed surface for display on the display 94.

First claim

What is claimed is:

1. An integrated circuit operable as a display controller for a data processing system, the integrated circuit being operable to receive, from a memory of the data processing system, graphics processing unit rendered input image data rendered by a graphics processing unit of the data processing system, and to provide output images for display to a display of the data processing system; wherein the integrated circuit comprises:
a local input buffer operable to store blocks of graphics processing unit rendered image data of a graphics processing unit rendered input image that has been rendered with respect to a first view orientation that is based on a first orientation of the display by a graphics processing unit of the data processing system;
input circuitry operable to fetch blocks of graphics processing unit rendered image data of a graphics processing unit rendered input image that has been rendered with respect to a first view orientation that is based on a first orientation of the display by a graphics processing unit of the data processing system from the memory of the data processing system into the local input buffer of the integrated circuit;
output circuitry operable to provide an output image for display to the display of the data processing system;
view orientation data receiving circuitry operable to receive view orientation data indicative of a second orientation of the display of the data processing system; and
transformation circuitry operable to:
determine, based on a second orientation of the display of the data processing system indicated by view orientation data received by the view orientation data receiving circuitry of the integrated circuit, one or more positions in a graphics processing unit rendered input image that has been rendered with respect to a first view orientation that is based on a first orientation of the display by a graphics processing unit of the data processing system from which graphics processing unit rendered image data should be sampled in order to provide an output view orientation transformed version of the graphics processing unit rendered input image which represents the graphics processing unit rendered input image as if viewed from a second view orientation that is based on the second orientation of the display of the data processing system indicated by the view orientation data received by the view orientation data receiving circuitry of the integrated circuit;
identify, using the determined one or more positions in the graphics processing unit rendered input image, one or more blocks of graphics processing unit rendered image data of the graphics processing unit rendered input image whose graphics processing unit rendered image data will be required for providing the output view orientation transformed version of the graphics processing unit rendered input image;
cause the input circuitry of the integrated circuit to fetch the identified one or more blocks of graphics processing unit rendered image data of the graphics processing unit rendered input image from the memory of the data processing system into the local input buffer of the integrated circuit;
sample the determined one or more positions in the graphics processing unit rendered input image from blocks of graphics processing unit rendered image data of the graphics processing unit rendered input image stored in the local input buffer of the integrated circuit to provide the output view orientation transformed version of the graphics processing unit rendered input image; and
provide the output view orientation transformed version of the graphics processing unit rendered input image to the output circuitry of the integrated circuit for providing as an output image for display to the display of the data processing system.

2. The integrated circuit of claim 1 , wherein the transformation circuitry of the integrated circuit is configured to periodically update its transformation operation based on view orientation data newly received by the view orientation data receiving circuitry of the integrated circuit each time a selected number of some but not all lines of the output view orientation transformed version of the graphics processing unit rendered input image have been generated.

3. The integrated circuit of claim 1 , wherein:
the transformation circuitry of the integrated circuit is operable to transform a graphics processing unit rendered input image based on a distortion that will be caused by a lens or lenses through which the displayed output transformed image will be viewed by a user.

4. The integrated circuit of claim 1 , wherein:
the transformation circuitry of the integrated circuit is operable to transform a graphics processing unit rendered input image based on a chromatic aberration that will be caused by a lens or lenses through which the displayed output transformed image will be viewed by a user.

5. The integrated circuit of claim 4 , wherein a separate chromatic aberration correction is determined by the transformation circuitry of the integrated circuit for different colour planes of the graphics processing unit rendered input image.

6. The integrated circuit of claim 1 , wherein:
the transformation circuitry of the integrated circuit comprises:
coordinate interpolator circuitry operable to determine for a data position in the view orientation transformed version of the graphics processing unit rendered input image that is to be generated, a corresponding position in the graphics processing unit rendered input image based on a defined lens distortion;
chromatic aberration correction circuitry operable to modify an input image position determined by the coordinate interpolator circuitry to account for chromatic aberration when viewing the view orientation transformed version of the graphics processing unit rendered input image to provide at least one modified input image position; and
view orientation transformation circuitry operable to further modify the at least one modified input image position determined by the chromatic aberration correction circuitry based on view orientation data received by the view orientation data receiving circuitry of the integrated circuit to provide a position of the one or more positions to be sampled to provide sampled image data to use for the data position of the view orientation transformed version of the graphics processing unit rendered input image.

7. The integrated circuit of claim 1 , wherein:
the transformation circuitry of the integrated circuit further includes interpolation circuitry that is operable to sample a determined position in the graphics processing unit rendered input image by interpolating plural input image sampling position values to provide an interpolated sampling position value for use for a data position in the output transformed image.

8. The integrated circuit of claim 1 , wherein:
the transformation circuitry of the integrated circuit operates to produce the output view orientation transformed version of the graphics processing unit rendered input image on a line-by-line basis, and to identify, using the determined one or more positions in the graphics processing unit rendered input image, one or more blocks of graphics processing unit rendered image data of the graphics processing unit rendered input image whose graphics processing unit rendered image data will be required for generating a line of the output view orientation transformed version of the graphics processing unit rendered input image that is currently being generated.

9. The integrated circuit of claim 1 , wherein:
the transformation circuitry of the integrated circuit comprises fixed-function processing circuitry that is configurable by setting one or

Assignees

• Advanced Risc Mach Ltd
• Apical Ltd

Inventors

• Bratt Ian Rudolf
• Chalfin Alexander Eugene
• Kunze Eric
• Hughes Paul Stanley
• Kornienko Alex
• Modrzyk Damian Piotr
• Ünal Metin Gokhan
• Lawton Jonathan Adam

Classifications

• G09G2354/00

  Aspects of interface with display user · CPC title

• G02B27/017 Primary

  Head mounted · CPC title

• G02B2027/014

  comprising information/image processing systems · CPC title

• G06T1/20

  Processor architectures; Processor configuration, e.g. pipelining · CPC title

• G06T1/60 Primary

  Memory management · CPC title