Systems and methods for finding a last good page in NAND open block

Patent metadata

Field	Value
Publication number	US-11126368-B2
Application number	US-201916398591-A
Country	US
Kind code	B2
Filing date	Apr 30, 2019
Priority date	Apr 30, 2019
Publication date	Sep 21, 2021
Grant date	Sep 21, 2021

Abstract

A method for finding a last good page in a memory system includes determining a first number of write operations in a first queue at a first page in a memory block of the memory system. The method also includes determining whether the first number of write operations in the first queue is above a threshold. The method also includes based on a determination that the first number of write operations in the first queue is above the threshold, determining whether a second page in the memory block is empty. The method also includes identifying, based on a determination that the second page is empty, the last good page in the memory block using a binary search between the first page and the second page.

First claim

What is claimed is:

1. A method for finding a last good page in a memory system, the method comprising:
determining a first determination of a first number of write operations in a first queue at a first page in a memory block of the memory system;
determining a second determination that the first number of write operations in the first queue is above a threshold;
based on the second determination that the first number of write operations in the first queue is above the threshold, determining a third determination of whether a second page in the memory block is empty or not empty;
either:
identifying, based on the third determination that the second page is empty, the last good page in the memory block using a binary search between the first page and the second page, or
determining, based on the third determination that the second page is not empty, a fourth determination of a second number of write operations in a second queue at the second page;

determining a fifth determination that the second number of write operations in the second queue is below the threshold; and
based on the fourth determination that the second number of write operations in the second queue equals 0, determining a sixth determination of whether a page that follows the second page is empty.

2. The method of claim 1 , wherein the first page includes a middle page of the memory block.

3. The method of claim 1 , wherein a number of pages between the first page and the second page corresponds to the first number of write operations in the first queue.

4. The method of claim 1 , further comprising determining that the second page is the last good page of the memory block based on a determination that the page that follows the second page is empty.

5. The method of claim 1 , further comprising determining, based on a determination that the page that follows the second page is not empty, a third number of write operations in a third queue at the page that follows the second page.

6. The method of claim 1 , further comprising, based on a determination that the second number of write operations in the second queue does not equal 0, determining whether the second number of write operations in the second queue is above the threshold.

7. The method of claim 6 , further comprising determining, based on a determination that the second number of write operations in the second queue is above the threshold, a third number of write operations at a third page of the memory block.

8. The method of claim 6 , further comprising identifying, based on a determination that the second number of write operations in the second queue is below the threshold, the last good page in the memory block using a binary search.

9. A controller comprising:
a bus interface configured to determine a first determination of a first number of write operations in a first queue at a first page in a memory block of a plurality of memory blocks; and
a processor configured to:
determine a second determination that the first number of write operations in the first queue is above a threshold;
based on the second determination that the first number of write operations in the first queue is above the threshold, determine a third determination of whether a second page in the memory block is empty or not empty;
either:
identify, based on the third determination that the second page is empty, a last good page in the memory block using a binary search between the first page and the second page, or
determine, based on the third determination that the second page is not empty, a fourth determination of a second number of write operations in a second queue at the second page;

determine a fifth determination that the second number of write operations in the second queue is below the threshold; and
based on the fourth determination that the second number of write operations in the second queue equals 0, determine a sixth determination of whether a page that follows the second page is empty.

10. The controller of claim 9 , wherein the first page includes a middle page of the memory block.

11. The controller of claim 9 , wherein a number of pages between the first page and the second page corresponds to the first number of write operations in the first queue.

12. The controller of claim 9 , wherein the processor is further configured to determine that the second page is the last good page of the memory block based on a determination that the page that follows the second page is empty.

13. The controller of claim 9 , wherein the processor is further configured to determine, based on a determination that the page that follows the second page is not empty, a third number of write operations in a third queue at the page that follows the second page.

14. The controller of claim 9 , wherein the processor is further configured to, based on a determination that the second number of write operations in the second queue does not equal 0, determine whether the second number of write operations in the second queue is above the threshold.

15. The controller of claim 14 , wherein the processor is further configured to determine, based on a determination that the second number of write operations in the second queue is above the threshold, a third number of write operations at a third page of the memory block.

16. A method for finding a last good page for each memory die in a memory system having multiple memory dies, the method comprising:
determining a first determination of a first number of write operations in a first queue at a first page in a first memory block of a first memory die;
determining a second determination that the first number of write operations in the first queue is above a threshold;
based on the second determination that the first number of write operations in the first queue is above the threshold, determining a third determination of whether a second page in the first memory block of the first memory die is empty or not empty;
either:
based on the third determination that the second page is empty, identifying a last good page in the first memory block of the first memory die using a binary search between the first page and the second page, or
based on the third determination that the second page is not empty, identifying the last good page in the first memory block of the first memory die using a second number of write operations in a second queue at the second page in the first memory block of the first memory die;

determining a fourth determination that the second number of write operations in the second queue is below the threshold;
based on a fifth determination that the second number of write operation in the second queue equals 0, determining a sixth determination of whether a page that follows the second page is empty; and
identifying a last good page in a second memory block of a second memory die using the last good page in the first memory block of the first memory die and a delta number of pages, wherein the delta number of pages corresponds to an inherent latency of the memory system.

Assignees

• Western Digital Tech Inc

Inventors

• Eliash Tomer
• Mekhanik Evgeny
• Rozman David
• Chasdai Yair

Classifications

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F3/064

  Management of blocks · CPC title

• G06F13/1668 Primary

  Details of memory controller · CPC title

• G06F3/0619

  in relation to data integrity, e.g. data losses, bit errors · CPC title

• G06F3/0653 Primary

  Monitoring storage devices or systems · CPC title