FPGA acceleration for serverless computing

Patent metadata

Field	Value
Publication number	US-11119821-B2
Application number	US-201916693930-A
Country	US
Kind code	B2
Filing date	Nov 25, 2019
Priority date	Jul 20, 2017
Publication date	Sep 14, 2021
Grant date	Sep 14, 2021

Abstract

In one embodiment, a method for FPGA accelerated serverless computing comprises receiving, from a user, a definition of a serverless computing task comprising one or more functions to be executed. A task scheduler performs an initial placement of the serverless computing task to a first host determined to be a first optimal host for executing the serverless computing task. The task scheduler determines a supplemental placement of a first function to a second host determined to be a second optimal host for accelerating execution of the first function, wherein the first function is not able to accelerated by one or more FPGAs in the first host. The serverless computing task is executed on the first host and the second host according to the initial placement and the supplemental placement.

First claim

What is claimed is:

1. A method for field programmable gate array (FPGA) accelerated serverless computing, the method comprising:
first placing a serverless computing task entirely with a first host of a plurality of hosts, the serverless computing task including at least a first portion and second portion;
first executing on the first host at least the first portion of the serverless computing task;
identifying, during the first executing, a second host of the plurality of hosts to execute the second portion;
second placing the second portion with the second host; and
second executing the second portion on the second host.

2. The method of claim 1 , further comprising:
identifying, prior to the first placing, the first host by estimating execution time of the serverless computing task for each of the plurality of hosts and selecting as the first host one of the plurality of hosts having less execution time than other ones of the plurality of hosts.

3. The method of claim 1 , wherein the second placing is in response to input of an actual input data size to a function during run-time exceeding a predicted input data size to the function.

4. The method of claim 1 , wherein the identifying a second host comprises estimating network communication overhead of data being redirected from the one of the plurality of hosts to others of the plurality of hosts, estimating execution time of a function on each of the others of the plurality of hosts, and selecting a second host having less network communication overhead and execution time than the others of the plurality of hosts.

5. A non-transitory computer readable media storing instructions programmed to cooperate with a system including electronic computer hardware to cause the system to perform operations comprising:
first placing a serverless computing task entirely with a first host of a plurality of hosts, the serverless computing task including at least a first portion and second portion;
first executing on the first host at least the first portion of the serverless computing task;
identifying, during the first executing, a second host of the plurality of hosts to execute the second portion;
second placing the second portion with the second host; and
second executing the second portion on the second host.

6. The media of claim 5 , the operations further comprising:
identifying, prior to the first placing, the first host by estimating execution time of the serverless computing task for each of the plurality of hosts and selecting as the first host one of the plurality of hosts having less execution time than other ones of the plurality of hosts.

7. The media of claim 5 , wherein the second placing is in response to input of an actual input data size to a function during run-time exceeding a predicted input data size to the function.

8. The media of claim 5 , wherein the identifying a second host comprises estimating network communication overhead of data being redirected from the one of the plurality of hosts to others of the plurality of hosts, estimating execution time of a function on each of the others of the plurality of hosts, and selecting a second host having less network communication overhead and execution time than the others of the plurality of hosts.

9. A system, comprising:
a processor including electronic computer hardware;
a non-transitory computer readable memory storing instructions programmed to cooperate with the processor to cause the system to perform operations comprising:
first placing a serverless computing task entirely with a first host of a plurality of hosts, the serverless computing task including at least a first portion and second portion;
first executing on the first host at least the first portion of the serverless computing task;
identifying, during the first executing, a second host of the plurality of hosts to execute the second portion;
second placing the second portion with the second host; and
second executing the second portion on the second host.

10. The system of claim 9 , the operations further comprising:
identifying, prior to the first placing, the first host by estimating execution time of the serverless computing task for each of the plurality of hosts and selecting as the first host one of the plurality of hosts having less execution time than other ones of the plurality of hosts.

11. The system of claim 9 , wherein the second placing is in response to input of an actual input data size to a function during run-time exceeding a predicted input data size to the function.

12. The system of claim 9 , wherein the identifying a second host comprises estimating network communication overhead of data being redirected from the one of the plurality of hosts to others of the plurality of hosts, estimating execution time of a function on each of the others of the plurality of hosts, and selecting a second host having less network communication overhead and execution time than the others of the plurality of hosts.

Assignees

• Cisco Tech Inc

Inventors

• Shimamura Komei
• Huang Xinyuan
• Saha Amit Kumar
• Dutta Debojyoti

Classifications

• G06F9/5066 Primary

  Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs (mappping at compile time, see G06F8/451) · CPC title

• G06F9/4881 Primary

  Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues · CPC title

• G06F9/5038

  considering the execution order of a plurality of tasks, e.g. taking priority or time dependency constraints into consideration (scheduling strategies G06F9/4881 and subgroups) · CPC title

• G06F9/5088

  involving task migration · CPC title