Method and apparatus for fast retraining of ethernet transceivers based on trickling error

US11115151B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-11115151-B1
Application numberUS-201916362500-A
CountryUS
Kind codeB1
Filing dateMar 22, 2019
Priority dateMar 22, 2019
Publication dateSep 7, 2021
Grant dateSep 7, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A method of operation for an Ethernet transceiver is disclosed. The method includes operating the Ethernet transceiver in a data mode, and triggering a fast retrain sequence of steps based on trickling error information. The triggering includes detecting error information, averaging the detected error information over a time interval to generate the trickling error information, comparing the averaged detected error information to a selected threshold value, and initiating the fast retrain sequence of steps based on the comparing.

First claim

Opening claim text (preview).

We claim: 1. A method of operation for an Ethernet transceiver, the method comprising: operating the Ethernet transceiver in a data mode; selecting a time interval for monitoring error information; and triggering a fast retrain sequence by detecting error information during the time interval, averaging at least two non-consecutive frame errors in the detected error information over the time interval to generate trickling error information, comparing the trickling error information to a selected threshold value, and performing the fast retrain sequence-based on the comparing. 2. The method according to claim 1 , wherein the error information comprises an error predictor. 3. The method according to claim 1 , wherein the error information comprises Low-Density Parity Check (LDPC) error code information. 4. The method according to claim 1 , wherein the error information comprises LDPC loop iteration information. 5. The method according to claim 1 , further comprising: operating the Ethernet transceiver in accordance with an NBASE-T Ethernet protocol. 6. The method according to claim 1 , further comprising: prior to operating the Ethernet transceiver in the data mode, performing a full training sequence. 7. An integrated circuit (IC) Ethernet transceiver chip comprising: training logic to trigger a fast retrain sequence during a data mode, the training logic including error detection circuitry to detect error information, circuitry to average at least two non-consecutive frame errors in the detected error information over a user-selected time interval to generate trickling error information, comparison circuitry to compare the trickling error information to a selected threshold value, and circuitry to perform the fast retrain sequence based on the comparing. 8. The IC Ethernet transceiver chip according to claim 7 , wherein the error information comprises an error predictor. 9. The IC Ethernet transceiver chip according to claim 7 , wherein: the error detection circuitry comprises low density parity check (LDPC) decoding circuitry. 10. The IC Ethernet transceiver chip according to claim 7 , wherein the error information comprises Low-Density Parity Check (LDPC) error code information. 11. The IC Ethernet transceiver chip according to claim 7 , wherein the error information comprises LDPC loop iteration information. 12. The IC Ethernet transceiver chip according to claim 7 , realized as an NBASE-T IC Ethernet transceiver chip. 13. A method of operation for an Ethernet transceiver, the method comprising: operating the Ethernet transceiver in a data mode; selecting a time interval for monitoring error information; establishing a consecutive frame error threshold and a trickling error threshold; detecting error information; averaging at least two non-consecutive frame errors in the error information over the time interval to generate trickling error information, and triggering a fast retrain sequence based on a comparison of the trickling error information during the time interval to the consecutive frame error threshold and the trickling error threshold. 14. The method according to claim 13 , wherein the detecting error information comprises: detecting an error predictor. 15. The method according to claim 14 , wherein the error predictor is based on a detected signal-to-noise ratio (SNR) along a channel coupled to the Ethernet transceiver.

Assignees

Inventors

Classifications

  • H04L1/203Primary

    Details of error rate determination, e.g. BER, FER or WER · CPC title

  • Arrangements at the receiver end · CPC title

  • H04L1/0041Primary

    Arrangements at the transmitter end · CPC title

  • Code rate detection or code type detection (H04L1/0038 takes precedence; detection of the data rate H04L25/0262; for packet format H04L1/0091) · CPC title

  • with extension to other symbols · CPC title

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What does patent US11115151B1 cover?
A method of operation for an Ethernet transceiver is disclosed. The method includes operating the Ethernet transceiver in a data mode, and triggering a fast retrain sequence of steps based on trickling error information. The triggering includes detecting error information, averaging the detected error information over a time interval to generate the trickling error information, comparing the av…
Who is the assignee on this patent?
Aquantia Corp, Marvell Asia Pte Ltd
What technology area does this patent fall under?
Primary CPC classification H04L1/203. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 07 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).