Semiconductor device
US-2024421048-A1 · Dec 19, 2024 · US
US11114372B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11114372-B2 |
| Application number | US-201916453552-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 26, 2019 |
| Priority date | Jun 29, 2018 |
| Publication date | Sep 7, 2021 |
| Grant date | Sep 7, 2021 |
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An integrated circuit includes a main body having a top and a bottom; and upper pins placed on the top of the main body, and lower pins placed on the bottom of the main body, in which each of the upper pins has a first protruding portion protruding toward outside from a side or the top of the main body, and each of the lower pins has a second protruding portion protruding toward outside from the side or the bottom of the main body.
Opening claim text (preview).
What is claimed is: 1. An integrated circuit comprising: a main body having a top and a bottom; and upper pins placed on the top of the main body, and lower pins placed on the bottom of the main body, wherein each of the upper pins has a first protruding portion protruding straightly toward outside from at least one side of the main body, and a first region extending from the first protruding portion and bent so that at least a portion of the first region faces and parallels the top of the main body, and wherein each of the lower pins has a second protruding portion straightly protruding toward outside from the at least one side of the main body, and a second region extending from the second protruding portion and bent so that at least a portion of the second region faces and parallels the bottom of the main body. 2. The integrated circuit of claim 1 , wherein at least one of a size and a shape of the upper pins and the lower pins are the same or different. 3. An integrated circuit comprising: a main body having a top and a bottom; and upper pins placed on the top of the main body, and lower pins placed on the bottom of the main body, wherein each of the upper pins has a first protruding portion protruding straightly toward outside from at least one side of the main body, and a first region extending from the first protruding portion and bent so that one end of the first region touches a surface of the top main body, and wherein each of the lower pins has a second protruding portion straightly protruding toward outside from the at least one side of the main body, and a second region extending from the second protruding portion and bent so that one end of the second region touches a surface of the bottom of the main body. 4. A circuit board comprising: a printed circuit board; and an integrated circuit mounted on the printed circuit board, the integrated circuit comprising: a main body having a top and a bottom; and upper pins placed on the top of the main body, and lower pins placed on the bottom of the main body, wherein each of the upper pins has a first protruding portion straightly protruding toward outside from at least one side of the integrated circuit, and a first region extending from the first protruding portion and bent so that at least a portion of the first region faces and parallels the top of the main body, and wherein each of the lower pins has a second protruding portion straightly protruding toward outside from the at least one side of the integrated circuit, and a second region extending from the second protruding portion and bent so that at least a portion of the second region faces and parallels the bottom of the main body. 5. A display device comprising: a display panel; a first circuit board and a second circuit board that are placed separately to transmit at least one of a signal and a voltage to the display panel; and a first integrated circuit and a second integrated circuit that are mounted on the first circuit board and the second circuit board, respectively, wherein the first integrated circuit and the second integrated circuit include pins having symmetrical pin arrangement, wherein, when viewed from above, the first integrated circuit appears to be given pin numbers to the pins in a first direction, and the second integrated circuit appears to be given the pin numbers to the pins in a second direction opposite to the first direction, wherein the first and second integrated circuits each comprise: a main body having a top and a bottom; and upper pins placed on the top of the main body, and lower pins placed on the bottom of the main body, wherein each of the upper pins has a first protruding portion protruding straightly toward outside from at least one side of the main body, and a first region extending from the first protruding portion and bent so that at least a portion of the first region faces and parallels the top of the main body, and wherein each of the lower pins has a second protruding portion straightly protruding toward outside from the at least one side of the main body, and a second region extending from the second protruding portion and bent so that at least a portion of the second region faces and parallels the bottom of the main body. 6. The display device of claim 5 , wherein the first integrated circuit is mounted on the first circuit board so that the top of the main body is visible, and the second integrated circuit is mounted on the second circuit board so that the bottom of the main body is visible. 7. The display device of claim 5 , wherein at least one of a size and a shape of the upper pins and the lower pins are the same or different. 8. The display device of claim 5 , wherein the first and/or second integrated circuit comprises a level shifter that generates and outputs clock signals.
characterised by the relative positions of pads or connectors relative to package parts · CPC title
being the outer leads · CPC title
Interconnections or connectors in packages · CPC title
for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title
comprising components on opposite major surfaces of semiconductor substrates · CPC title
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