Multilayer ceramic capacitor and method for producing the same

Patent metadata

Field	Value
Publication number	US-11114243-B2
Application number	US-201916383716-A
Country	US
Kind code	B2
Filing date	Apr 15, 2019
Priority date	Apr 27, 2018
Publication date	Sep 7, 2021
Grant date	Sep 7, 2021

Abstract

A multilayer ceramic capacitor has a cuboid or substantially cuboid multilayer body including a stack of dielectric layers, inner-electrode layers alternating with the dielectric layers and exposed at end surfaces of the multilayer body, and outer electrodes on the end surfaces and coupled to the inner-electrode layers. The dielectric layers are primarily made of barium titanate. At the interfaces between the dielectric and inner-electrode layers, protective layers containing calcium zirconate cover the inner-electrode layers.

First claim

What is claimed is:

1. A multilayer ceramic capacitor comprising:
a multilayer body including:
a stack of a plurality of dielectric layers;
first and second primary surfaces opposite to each other in a stacking direction;
first and second lateral surfaces opposite to each other in a width direction perpendicular to the stacking direction; and
first and second end surfaces opposite to each other in a length direction perpendicular to both the stacking direction and the width direction;

a plurality of inner-electrode layers alternating with the dielectric layers and exposed at the end surfaces; and
outer electrodes disposed on the end surfaces and connected to the inner-electrode layers; wherein
the dielectric layers include barium titanate as a primary component; and
protective layers containing calcium zirconate covering the inner-electrode layers are located at interfaces between the dielectric layers and the inner-electrode layers.

2. The multilayer ceramic capacitor according to claim 1 , wherein the protective layers have a thickness of about 1.5% or more and about 15% or less with respect to a thickness of the dielectric layers.

3. The multilayer ceramic capacitor according to claim 1 , wherein
the multilayer body includes two outer-layer sections each defined by multiple ones of the plurality of dielectric layers, and an inner-layer section defined by one or more of the plurality of dielectric layers and multiple ones of the plurality of inner-electrode layers; and
the two outer-layer sections have thicknesses of about 20 μm or more and about 200 μm or less.

4. The multilayer ceramic capacitor according to claim 1 , wherein the plurality of dielectric layers include at least one of Mn, Fe, Cr, Co, and Ni.

5. The multilayer ceramic capacitor according to claim 1 , wherein a thickness of each of the plurality of dielectric layers is about 0.70 μm or more and about 1.50 μm or less.

6. The multilayer ceramic capacitor according to claim 1 , wherein the plurality of inner-electrode layers are made of at least one of Ni, Cu, Ag, Pd, Au, and alloys containing Ni, Cu, Ag, Pd, and Au.

7. The multilayer ceramic capacitor according to claim 1 , wherein a thickness of each of the plurality of inner-electrode layers is about 0.2 μm or more and about 2.0 μm or less.

8. The multilayer ceramic capacitor according to claim 1 , wherein the plurality of inner-electrode layers define first and second inner-electrodes layers which are respectively connected to different ones of the outer electrodes.

9. The multilayer ceramic capacitor according to claim 8 , wherein
the plurality of inner-electrode layers include floating inner-electrode layers which are provided between the first and second inner-electrodes layers; and
the floating inner-electrode layers are not connected to the outer electrodes.

10. The multilayer ceramic capacitor according to claim 9 , wherein the first and second inner-electrodes layers and the floating inner-electrode layers define multiple divided facing-electrode sections generating individual capacitances.

11. The multilayer ceramic capacitor according to claim 1 , wherein the outer electrodes include a substrate electrode layer and a plating layer.

12. The multilayer ceramic capacitor according to claim 11 , wherein the substrate electrode layer contacts and partially covers each of the first and second primary surfaces and the first and second lateral surfaces.

13. The multilayer ceramic capacitor according to claim 12 , wherein the substrate electrode layer includes a baked layer that includes: (i) a metal including at least one of Cu, Ni, Ag, Pd, Ag—Pd alloys, Au, and (ii) a glass including at least one of B, Si, Ba, Mg, Al, Li.

14. The multilayer ceramic capacitor according to claim 12 , wherein the substrate electrode layer has a thickness of about 10 μm or more and about 50 μm.

15. The multilayer ceramic capacitor according to claim 12 , wherein the substrate electrode layer includes an electrically conductive resin layer.

16. The multilayer ceramic capacitor according to claim 15 , wherein the electrically conductive resin layer includes a thermosetting resin and metal.

17. The multilayer ceramic capacitor according to claim 15 , wherein a thickness of the electrically conductive resin layer is about 10 μm or more and about 150 μm or less.

18. The multilayer ceramic capacitor according to claim 11 , wherein the plating layer includes a lower plating electrode on the multilayer body and an upper plating electrode on a surface of the lower plating electrode.

Assignees

• Murata Manufacturing Co

Inventors

• Sugita Hiroaki

Classifications

• H01G4/248

  the terminals embracing or surrounding the capacitive element, e.g. caps (H01G4/252 takes precedence) · CPC title

• H01G4/1227

  based on alkaline earth titanates · CPC title

• H01G4/012

  Form of non-self-supporting electrodes · CPC title

• H01G4/0085 Primary

  Fried electrodes · CPC title

• H01G4/1236 Primary

  based on zirconium oxides or zirconates (H01G4/1263 takes precedence) · CPC title