System and technique for loading classical data into a quantum computer

Patent metadata

Field	Value
Publication number	US-11113621-B2
Application number	US-201916239983-A
Country	US
Kind code	B2
Filing date	Jan 4, 2019
Priority date	Jan 8, 2018
Publication date	Sep 7, 2021
Grant date	Sep 7, 2021

Abstract

Quantum circuits and methods load N=2n classical bits into an entangled quantum output state using a gate depth of order O(n). Loading is accomplished by dividing the 2n input bits into data words and entangling these data words using ancilla qubits. The output of the circuit consists of one data word and one or several index qubits, drawn from the ancilla, to select between the input data words. Entanglement of the data words is performed in a single time slice (i.e. with a gate depth of 1), while the number of sequential gates needed to produce the appropriate pre-entanglement quantum state in the ancilla, and to disentangle the non-output ancilla, has the desired order O(n). Also disclosed is a circuit for disentangling qubits used to store non-output data words during processing.

First claim

What is claimed is:

1. A circuit for entangling quantum states of a plurality of at most 2 n input data qubits that are initially unentangled, the circuit comprising:
a plurality of ancilla qubits having an initially unentangled quantum state, the plurality of ancilla qubits being divided into first and second non-empty subsets, wherein the circuit provides as output qubits the second subset of ancilla qubits and a subset of the input data qubits;
a first stage of quantum gates configured to entangle the quantum states of the plurality of ancilla qubits according to a given entangled state;
a second stage of quantum gates configured to entangle, in parallel, the quantum state of each of the plurality of ancilla qubits with the quantum state of a corresponding pair of the data qubits; and
a third stage of quantum gates configured to disentangle the first subset of ancilla qubits from the output qubits.

2. A circuit according to claim 1 , wherein the first stage of quantum gates generates the given entangled state as a superposition of an all-zero state with an all-one state.

3. A circuit according to claim 1 , wherein each ancilla qubit in the plurality of ancilla qubits is used in at most order O(n) quantum gates in the first stage of quantum gates.

4. A circuit according to claim 1 , wherein the first stage of quantum gates performs an ordered sequence of quantum operations and the third stage of quantum gates performs an initial portion of the reverse-ordered sequence of quantum operations.

5. A circuit according to claim 1 , wherein each ancilla qubit and each data qubit is used in exactly one quantum gate in the second stage of quantum gates.

6. A circuit according to claim 1 , wherein each ancilla qubit in the plurality of ancilla qubits is used in at most order O(n) quantum gates in the third stage of quantum gates.

7. A circuit according to claim 1 , wherein the third stage of quantum gates comprises quantum gates for disentangling one or more data qubits from the ancilla qubits, and quantum gates for disentangling one or more ancilla qubits in the first subset of ancilla qubits from the input data qubits.

8. A circuit according to claim 1 , further comprising a first circuit for performing a first quantum computation using the output qubits, and further comprising a second circuit for performing a second quantum computation using the first subset of ancilla qubits without destroying the entanglement of the output qubits.

9. A first entangling circuit according to claim 1 , further comprising a second entangling circuit according to claim 1 , wherein the input data qubits of the second entangling circuit include the output qubits of the first entangling circuit.

10. A circuit according to claim 9 , wherein the third stage of quantum gates in the second entangling circuit is configured to disentangle the first subset of ancilla qubits in the second entangling circuit from the output qubits of the second entangling circuit using a quantum state that is at least partially encoded in the first subset of ancilla qubits of the first entangling circuit.

11. A method of entangling quantum states of a plurality of at most 2 n input data qubits that are initially unentangled, the method comprising:
providing a plurality of ancilla qubits having a given entangled state, the plurality of ancilla qubits being divided into first and second non-empty subsets;
entangling, in parallel, the quantum state of each of the plurality of ancilla qubits with the quantum states of corresponding words formed from the input data qubits;
disentangling the first subset of ancilla qubits from the second subset of ancilla qubits and the data qubits; and
outputting the quantum state of the second subset of ancilla qubits and a word of the data qubits.

12. A method according to claim 10 , wherein providing the plurality of ancilla qubits having the given entangled state comprises generating a superposition of an all-zero state with an all-one state.

13. A method according to claim 12 , wherein generating the given entangled state comprises using each ancilla qubit in the plurality of ancilla qubits in at most order O(n) quantum gates.

14. A method according to claim 12 , wherein generating the given entangled state comprises performing an ordered sequence of quantum operations and disentangling comprises performing an initial portion of the reverse-ordered sequence of quantum operations.

15. A method according to claim 11 , wherein entangling the quantum state comprises using each ancilla qubit and each data qubit in exactly one quantum gate.

16. A method according to claim 11 , wherein disentangling comprises using each ancilla qubit in the plurality of ancilla qubits in at most order O(n) quantum gates.

17. A method according to claim 11 , wherein disentangling the first subset of ancilla qubits from the second subset of ancilla qubits and the data qubits comprises disentangling one or more data qubits from the ancilla qubits, and disentangling one or more ancilla qubits in the first subset of ancilla qubits from the input data qubits.

18. A method according to claim 11 , further comprising performing a first quantum computation using the output qubits, and further comprising performing a second quantum computation using the first subset of ancilla qubits without destroying the entanglement of the output qubits.

19. A method according to claim 11 performed a plurality of times, wherein the input data of each performance except the first performance comprises the output data of the immediately preceding performance.

20. A method according to claim 19 , wherein, in each performance except the first, disentangling the first subset of ancilla qubits from the second subset of ancilla qubits and the data qubits comprises using a quantum state that is at least partially encoded in the qubits disentangled by the immediately preceding performance.

Assignees

• Massachusetts Inst Technology

Inventors

• Cortese John
• Braje Timothy

Classifications

• G06N10/70

  Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation · CPC title

• G06N10/20 Primary

  Models of quantum computing, e.g. quantum circuits or universal quantum computers · CPC title

• G06N10/00 Primary

  Quantum computing, i.e. information processing based on quantum-mechanical phenomena · CPC title