Differential circuit calibration apparatus and method

US11112481B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11112481-B2
Application numberUS-201916418710-A
CountryUS
Kind codeB2
Filing dateMay 21, 2019
Priority dateMay 24, 2018
Publication dateSep 7, 2021
Grant dateSep 7, 2021

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Abstract

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An apparatus for calibrating a differential circuit that includes a differential integrator having an input, a gain, and an output connected to a comparator. The differential integrator output is chargeable to a threshold prior to an integration period. The differential integrator integrates the input during the integration period such that the differential integrator output goes toward zero from the threshold. The comparator detects the output of the differential integrator reaching zero. The apparatus includes a closed-loop gain trim circuit to perform a coarse calibration to adjust and set the gain of the differential integrator and a reference generator that generates the threshold to which the differential integrator output is pre-charged. The reference generator is trimmable during a fine calibration to adjust and set the threshold to correct for residual gain error in the differential circuit remaining after the coarse calibration is performed.

First claim

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The invention claimed is: 1. An apparatus for calibrating a differential circuit that includes a differential integrator having an input, a gain, and an output connected to a comparator, wherein the differential integrator output is chargeable to a threshold prior to an integration period, wherein the differential integrator integrates the input during the integration period such that the differential integrator output goes toward zero from the threshold, wherein the comparator detects the output of the differential integrator reaching zero, the apparatus comprising: a closed-loop gain trim circuit to perform a coarse calibration to adjust and set the gain of the differential integrator; a reference generator that generates the threshold to which the differential integrator output is pre-charged; and wherein the reference generator is trimmable during a fine calibration to adjust and set the threshold to correct for residual gain error in the differential circuit remaining after the coarse calibration is performed. 2. The apparatus of claim 1 , wherein the input of the differential integrator senses a current drawn from a voltage source/supply; and wherein the differential circuit is operable to detect the over-threshold condition of an average current drawn from the voltage source/supply if the comparator detects the output of the differential integrator reaches zero. 3. The apparatus of claim 2 , wherein after the coarse calibration and fine calibration are performed, the differential circuit is configured to detect the over-threshold condition of the average current drawn from the voltage source/supply with a range of error less than 0.3%. 4. The apparatus of claim 2 , wherein the input of the differential integrator senses the current drawn from the voltage source/supply across a sense resistor; wherein a resistance value of the sense resistor is configurable to a plurality of different values; and wherein the threshold generated by the reference generator is scalable to a plurality of different values corresponding to the plurality of different configurable resistance values of the sense resistor. 5. The apparatus of claim 1 , wherein the fine calibration is performed by sourcing a known current value to the differential circuit for a known value of the integration period and adjusting the threshold in an iterative manner until successive transitions of the output of the comparator are detected. 6. The apparatus of claim 1 , wherein the reference generator comprises a trimmable digital-to-analog converter (DAC). 7. The apparatus of claim 6 , wherein the fine calibration applies a successive approximation register (SAR) algorithm to the trimmable DAC. 8. The apparatus of claim 6 , wherein the reference generator is programmable to a plurality of different values of the threshold; and wherein the coarse calibration and fine calibration are performed at a single programmed value of the plurality of different values of the threshold. 9. The apparatus of claim 8 , wherein resistive elements of the DAC are accurately sized to achieve a range of error less than 0.3% for detection of an over-threshold condition for each of the plurality of different values of the threshold after performance of the coarse calibration and fine calibration at the single value. 10. The apparatus of claim 1 , wherein the coarse calibration comprises adjusting and setting a capacitance of an integrating capacitor of the differential integrator or an integrating resistor of the differential integrator. 11. The apparatus of claim 1 , wherein single-ended outputs of the differential integrator concurrently cross a common mode reference when the output of the differential integrator reaches the zero value; wherein the reference generator converts the common mode reference to the threshold; and wherein the reference generator is trimmable during the fine calibration to adjust and set the threshold by adjusting and setting the common mode reference. 12. The apparatus of claim 1 , wherein the reference generator is adjustable to support a plurality of different values of the integration period. 13. A method for calibrating a differential circuit that includes a differential integrator having an input, a gain, and an output connected to a comparator, wherein the differential integrator output is chargeable to a threshold prior to an integration period, wherein the differential integrator integrates the input during the integration period such that the differential integrator output goes toward zero from the threshold, wherein the comparator detects the output of the differential integrator reaching zero, the method comprising: performing, in a closed-loop manner, a coarse calibration to adjust and set the gain of the differential integrator; and performing a fine calibration of a trimmable reference generator that generates the threshold to which the differential integrator output is pre-charged by adjusting and setting the threshold to correct for residual gain error in the differential circuit remaining after the coarse calibration is performed. 14. The method of claim 13 , wherein the input of the differential integrator senses a current drawn from a voltage source/supply; and wherein the differential circuit is operable to detect the over-threshold condition of an average current drawn from the voltage source/supply if the comparator detects the output of the differential integrator reaches zero. 15. The method of claim 14 , wherein after the coarse calibration and fine calibration are performed, the differential circuit is configured to detect the over-threshold condition of the average current drawn from the voltage source/supply with a range of error less than 0.3%. 16. The method of claim 14 , wherein the input of the differential integrator senses the current drawn from the voltage source/supply across a sense resistor; wherein a resistance value of the sense resistor is configurable to a plurality of different values; and wherein the threshold generated by the reference generator is scalable to a plurality of different values corresponding to the plurality of different configurable resistance values of the sense resistor. 17. The method of claim 13 , wherein said performing the fine calibration comprises sourcing a known current value to the differential circuit for a known value of the integration period and adjusting the threshold in an iterative manner until successive transitions of the output of the comparator are detected. 18. The method of claim 13 , wherein the reference generator comprises a trimmable digital-to-analog converter (DAC). 19. The method of claim 18 , wherein said performing the fine calibration comprises applying a successive approximation register (SAR) algorithm to the trimmable DAC. 20. The method of claim 18 , wherein the reference generator is programmable to a plurality of different values of the threshold; and wherein said performing the coarse calibration and the fine calibration are performed at a single programmed value of the plurality of different values of the threshold. 21. The method of claim 20 , wherein resistive elements of the DAC are accurately sized to achieve a range of error less than 0.3% for detection of an over-threshold condition for each of the plurality of different values of the threshold after performance of the coarse calibration and fine calibration at the single value. 22. The method

Assignees

Inventors

Classifications

  • H03K5/24Primary

    the characteristic being amplitude · CPC title

  • Automatic control ({H03G3/005 takes precedence;} combined with volume compression or expansion H03G7/00) · CPC title

  • Calibrating and standardising a dif amp · CPC title

  • Class D power amplifiers; Switching amplifiers · CPC title

  • by trimming, i.e. by individually adjusting at least part of the quantisation value generators or stages to their nominal values · CPC title

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What does patent US11112481B2 cover?
An apparatus for calibrating a differential circuit that includes a differential integrator having an input, a gain, and an output connected to a comparator. The differential integrator output is chargeable to a threshold prior to an integration period. The differential integrator integrates the input during the integration period such that the differential integrator output goes toward zero fr…
Who is the assignee on this patent?
Cirrus Logic Int Semiconductor Ltd, Cirrus Logic Inc
What technology area does this patent fall under?
Primary CPC classification H03K5/24. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 07 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).