In-situ quantum error correction

Patent metadata

Field	Value
Publication number	US-11106992-B2
Application number	US-202016905372-A
Country	US
Kind code	B2
Filing date	Jun 18, 2020
Priority date	Nov 6, 2015
Publication date	Aug 31, 2021
Grant date	Aug 31, 2021

Abstract

Methods, systems, and apparatus for parallel optimization of continuously running quantum error correction by closed-loop feedback. In one aspect, a method includes continuously and effectively optimizing qubit performance in-situ whilst an error correction operation on the quantum system is running. The method directly monitors the output from error detection and provides this information as feedback to calibrate the quantum gates associated with the quantum system. In some implementations, the physical qubits are spatially partitioned into one or more independent hardware patterns, where the errors attributable to each hardware pattern are non-overlapping. The one or more different sets of hardware patterns are then temporarily interleaved such that all physical qubits and operations are optimized. The method allows for the optimization of each section of a hardware pattern to be performed individually and in parallel, and can result is O(1) scaling.

First claim

What is claimed is:

1. An apparatus comprising a processor and an error corrector subsystem, in data communication with measurement qubits, the apparatus configured to:
partition data qubits and measurement qubits into a plurality of patterns, where at least one pattern is subject to non-overlapping errors for the pattern, wherein a nonoverlapping error for a pattern is an error that is attributable to the pattern; and
for each pattern that includes data qubits and measurement qubits that are operated on by CNOT gates:
optimize in parallel parameters of single qubit quantum gates that operate on the data qubits; and
select sets of CNOT gates defining a same direction and optimize in parallel parameters for CNOT gates in each selected set.

2. The apparatus of claim 1 , wherein the apparatus further comprises:
a plurality of data qubits;
a plurality of measurement qubits, interleaving the data qubits such that each data qubit has one or more neighboring measurement qubits;
a plurality of readout quantum gates, each readout quantum gate configured to operate on a measurement qubit;
a plurality of single qubit quantum gates, each single qubit quantum gate configured to operate on a data qubit or a measurement qubit;
a plurality of CNOT quantum gates, each CNOT quantum gate configured to operate on a data qubit and a neighboring measurement qubit, and each CNOT gate defines one of a plurality of directions.

3. The apparatus of claim 2 , wherein the plurality of data qubits and measurement qubits are interleaved such that the plurality of data qubits and measurement qubits defines a one-dimensional chain of qubits and the plurality of directions comprises a first direction and a second direction opposite to the first direction.

4. The apparatus of claim 2 , wherein the plurality of single qubit quantum gates comprise phase shift gates or rotation gates.

5. The apparatus of claim 2 , wherein, for each CNOT gate, the data qubit is a control qubit and the neighboring measurement qubit is a target qubit.

6. The apparatus of claim 2 , wherein, for each CNOT gate, the data qubit is a target qubit and the neighboring measurement qubit is a control qubit.

7. The apparatus of claim 1 , wherein to optimize in parallel parameters of single qubit quantum gates that operate on the data qubits the error correction subsystem is configured to perform a repeated process using closed-loop feedback, wherein at each repetition the error correction subsystem is configured to, in parallel, for each data qubit:
define a corresponding metric for minimization as an error rate;
measure corresponding measurement qubits to determine an error rate;
store the determined error rate;
calculate a change in the error rate between the determined error rate and a stored error rate from a previous repetition; and
adjust the single qubit quantum gate parameters based on the calculated change in error rate.

8. The apparatus of claim 7 , wherein to adjust the single qubit quantum gate parameters based on the calculated change in error rate the error correction subsystem is configured to apply a numerical optimization algorithm.

9. The apparatus of claim 1 , wherein to select sets of CNOT gates defining a same direction and optimizing in parallel parameters for the selected CNOT gates the error correction subsystem is configured to, for each selected set of CNOT gates:
in parallel, for each data qubit in the selected set:
define a corresponding metric for minimization as an error rate;
measure corresponding measurement qubits to determine an error rate;
store the determined error rate;
calculate a change in the error rate between the determined error rate and a stored error rate from a previous repetition; and
adjust the CNOT gate parameters based on the calculated change in error rate.

10. The apparatus of claim 9 , wherein to adjust the CNOT gate parameters based on the calculated change in error rate the error correction subsystem is configured to apply a numerical optimization algorithm.

11. A method, comprising:
partitioning data qubits and measurement qubits into a plurality of patterns, where at least one pattern is subject to non-overlapping errors for the pattern, wherein a non-overlapping error for a pattern is an error that is attributable to the pattern; and
for a pattern that includes data qubits and measurement qubits that are operated on by CNOT gates:
optimizing in parallel parameters of single qubit quantum gates that operate on the data qubits; and
selecting sets of CNOT gates defining a same direction and optimizing in parallel parameters for CNOT gates in each selected set.

12. The method of claim 11 , further comprising:
accessing a quantum information storage system that comprises:
a plurality of data qubits;
a plurality of measurement qubits, interleaving the data qubits such that each data qubit has a neighboring measurement qubit;
a plurality of readout quantum gates, each readout quantum gate configured to operate on a measurement qubit;
a plurality of single qubit quantum gates, each single qubit quantum gate configured to operate on a data qubit or a measurement qubit; and
a plurality of CNOT quantum gates, each CNOT quantum gate configured to operate on a data qubit and a neighboring measurement qubit, and each CNOT gate defines one of a plurality of directions.

13. The method of claim 12 , wherein the plurality of data qubits and measurement qubits are interleaved such that the plurality of data qubits and measurement qubits defines a one-dimensional chain of qubits and the plurality of directions comprises a first direction and a second direction opposite to the first direction.

14. The method of claim 12 , wherein the plurality of single qubit quantum gates comprise phase shift gates or rotation gates.

15. The method of claim 12 , wherein, for each CNOT gate, the data qubit is a control qubit and the neighboring measurement qubit is a target qubit.

16. The method of claim 12 , wherein, for each CNOT gate, the data qubit is a target qubit and the neighboring measurement qubit is a control qubit.

17. The method of claim 11 , wherein optimizing in parallel parameters of single qubit quantum gates that operate on the data qubits is a repeated process using closed-loop feedback, wherein each repetition comprises, in parallel, for each data qubit:
defining a corresponding metric for minimization as an error rate;
measuring corresponding measurement qubits to determine an error rate;
storing the determined error rate;
calculating a change in the error rate between the determined error rate and a stored error rate from a previous repetition; and
adjusting the single qubit quantum gate parameters based on the calculated change in error rate.

18. The method of claim 17 , wherein adjusting the single qubit quantum gate parameters based on the calculated change in error rate comprises applying a numerical optimization algorithm.

19. The method of claim 11 , wherein selecting sets of CNOT gates defining a same direction and optimizing in parallel parameters for the selected CNOT gates comprises, for each selected set of CNOT gates:
in parallel, for each data qubit in the selected set:
defining a corresponding metric for minimization as an error rate;
measuring corresponding measurement qubits to determine an error rate;
storing the determined error rate;
calculating a change in the error rate between the determined error rate and a stored error rate from a previous repetition; and
adjusting the CNOT gate

Assignees

• Google Llc

Inventors

• Kelly Julian Shaw

Classifications

• H10D48/383

  Quantum effect devices, e.g. of devices using quantum reflection, diffraction or interference effects · CPC title

• G06N10/60

  Quantum algorithms, e.g. based on quantum optimisation, quantum Fourier or Hadamard transforms · CPC title

• G06N10/40

  Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control · CPC title

• G06N10/70 Primary

  Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation · CPC title

• G06N10/20

  Models of quantum computing, e.g. quantum circuits or universal quantum computers · CPC title