Read only bufferpool

US11100083B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11100083-B2
Application numberUS-201515545526-A
CountryUS
Kind codeB2
Filing dateJan 29, 2015
Priority dateJan 29, 2015
Publication dateAug 24, 2021
Grant dateAug 24, 2021

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

Example implementations disclosed herein include techniques for a ready only bufferpool for use in local nodes of a multi-node computing system. Read only transactions executed by a processor can reference a ready only bufferpool resident in a VRAM on the same node. If the desired data page is in the bufferpool the transaction can immediately read data records from the cached data pages. If the desired data page is not in the bufferpool, then the transaction can cause a copy of a corresponding data page in a secondary memory to be installed in the bufferpool. The bufferpool can include more than one copy of a data page simultaneously to handle and prevent cache line misses. Data page are dropped from the bufferpool based on an incrementing per data page counter.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: determining, by a processor, a plurality of log entries according to a plurality of partitions, wherein each of the plurality of log entries corresponds with a transaction comprising a key; copying, by the processor, the plurality of log entries according to the plurality of partitions to a batch buffer; batch sorting, by the processor, the batch buffer to generate a single file of sorted log entries, wherein each of the entries in the single file is associated with the corresponding key; generating, by the processor, a new nonvolatile data page based on the single file of sorted log entries, wherein the new nonvolatile data page corresponds with physical addresses from a storage in a non-volatile random access memory (NVRAM) and the new nonvolatile data page is stored into a read only bufferpool; generating a new pointer to the physical address in the NVRAM; setting, by the processor, a counter in the copy of the data page; incrementing the counter when a new transaction is added to the plurality of log entries; and when the counter reaches a threshold count, ejecting the copy of the data page out of the read only bufferpool. 2. The method of claim 1 , further comprising: associating, by the processor, the copy of the data page with a first hash value; initiating, by the processor, a subsequent transaction comprising the key; determining, by the processor, that the subsequent transaction comprises read-only operations; installing, by the processor, an additional copy of the data page from the storage in the non-volatile random access memory into the read only bufferpool; and associating, by the processor, the additional copy of the data page with a second hash value. 3. The method of claim 2 , wherein the first hash value and the second hash value are different. 4. A system comprising: a plurality of processors; a plurality of volatile random access memories coupled to one or more of the plurality of processors; a plurality of non-volatile random access memories coupled to one or more of the plurality of processors, wherein at least one of the plurality of non-volatile random access memories comprises instructions, that when executed by one or more processors in the plurality of processors, cause the processors to: determine a transaction comprising a key; copy the plurality of log entries according to the plurality of partitions to a batch buffer; batch sort the batch buffer to generate a single file of sorted log entries, wherein each of the entries in the single file is associated with the corresponding key: generate a new nonvolatile data page based on the single file of sorted log entries, wherein the new nonvolatile data page corresponds with physical addresses from a storage in one of the non-volatile random access memories (NVRAM) and the new nonvolatile data page is stored into a read only bufferpool; generate a new pointer to the physical address in the NVRAM; set a counter in the copy of the data page; increment the counter when a new transaction is added to the plurality of log entries; and when the counter reaches a threshold count, eject the copy of the data page out of the read only bufferpool. 5. The system of claim 4 wherein the instructions further cause the processors to: associate the copy of the data page with a first hash value; initiate a subsequent transaction comprising the key; determine that the subsequent transaction comprises read-only operations; install an additional copy of the data page from the storage in the non-volatile random access memory into the read only bufferpool; and associate the additional copy of the data page with a second hash value. 6. The system of claim 5 wherein to install the additional copy of the data page is in response to a cache miss involving the first hash value or the copy of the data page. 7. A non-transitory computer readable storage medium comprising instructions, that when executed by a processor, cause the processor to: determine a plurality of log entries according to a plurality of partitions, wherein each of the plurality of log entries corresponds with a transaction comprising a key; copy the plurality of log entries according to the plurality of partitions to a batch buffer; batch sort the batch buffer to generate a single file of sorted log entries, wherein each of the entries in the single file is associated with the corresponding key; generate a new nonvolatile data page based on the single file of sorted log entries, wherein the new nonvolatile data page corresponds with physical addresses from a storage in one of the non-volatile random access memories(NVRAM) and the new nonvolatile data page is stored into a read only bufferpool; generating a new pointer to the physical address in the NVRAM; set a counter in the copy of the data page; increment the counter when a new transaction is added to the plurality of log entries; and when the counter reaches a threshold count, ejecting the copy of the data page out of the read only bufferpool. 8. The non-transitory computer readable storage medium of claim 7 wherein the instructions further cause the processor to: read a tuple associated with the key from the copy of the data page; and operate on the tuple based on the transaction. 9. The non-transitory computer readable storage medium of claim 7 , wherein the instructions further cause the processor to: initiate a subsequent transaction comprising the key; determine that the subsequent transaction comprises read-only operations; generate a second hash value based on the key; install an additional copy of the data page from the storage in the non-volatile random access memory into the read only bufferpool; and associate the additional copy of the data page with the second hash value. 10. The non-transitory computer readable storage medium of claim 9 wherein the hash value and the second hash value are the same. 11. The method of claim 1 , further comprising: initiating, by the processor, a hopscotch hashing scheme with the key to insert the key into a hash table. 12. The method of claim 1 , further comprising: after copy of the data page is ejected, removing the key from a hash table. 13. The method of claim 1 , wherein a second copy of the data page if generated with a cache miss. 14. The method of claim 1 , wherein the plurality of log entries are received from multiple processor cores in a node. 15. The method of claim 1 , wherein the plurality of log entries are mapped to buffers according to key ranges or storage identifiers. 16. The method of claim 1 , further comprising: determining that the transaction comprises read-only operations such that the plurality of log entries are not changed or updated in an original storage location at a database management system (DBMS).

Assignees

Inventors

Classifications

  • hash tables · CPC title

  • Metadata, control data · CPC title

  • Latency reduction · CPC title

  • Information retrieval; Database structures therefor; File system structures therefor · CPC title

  • Ensuring data consistency and integrity · CPC title

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Frequently asked questions

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What does patent US11100083B2 cover?
Example implementations disclosed herein include techniques for a ready only bufferpool for use in local nodes of a multi-node computing system. Read only transactions executed by a processor can reference a ready only bufferpool resident in a VRAM on the same node. If the desired data page is in the bufferpool the transaction can immediately read data records from the cached data pages. If the…
Who is the assignee on this patent?
Hewlett Packard Entpr Dev Lp
What technology area does this patent fall under?
Primary CPC classification G06F16/9014. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 24 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).