Digit validation check control in instruction execution

US11099853B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11099853-B2
Application numberUS-201916277486-A
CountryUS
Kind codeB2
Filing dateFeb 15, 2019
Priority dateFeb 15, 2019
Publication dateAug 24, 2021
Grant dateAug 24, 2021

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Digit validation check control for execution of an instruction. A process obtains an instruction to perform operation(s) using input value(s). The instruction includes a no validation indicator for controlling whether digit validation check control is enabled for execution of the instruction. The process executes the instruction, including determining, based on the no validation indicator, whether digit validation check control is enabled for execution of the instruction, and performing processing based on the determining. Based on the no validation indicator being set to a defined value, digit validation check control is enabled and the processing includes forcing a digit check error indicator output by the executing to indicate no digit check error with respect to the at least one input value.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer program product for facilitating processing within a computing environment, the computer program product comprising: a non-transitory computer readable storage medium readable by a processing circuit and storing instructions for performing a method comprising: obtaining an instruction to perform one or more operations using at least one input value, the instruction being a single architected instruction, and the instruction comprising a no-validation indicator for controlling whether digit validation check control is enabled for execution of the instruction; and executing the instruction, the executing comprising: determining, based on the no-validation indicator, whether digit validation check control is enabled for execution of the instruction; and performing processing based on the determining, wherein based on the no-validation indicator being set to a defined value, digit validation check control is enabled and the processing comprises forcing a digit check error indicator output by the executing to indicate no digit check error with respect to the at least one input value. 2. The computer program product of claim 1 , wherein the executing further comprises performing a digit validation check on the at least one input value, the digit validation check to validate whether the at least one input value comprises numerical digits in defined positions and to output a result indicating, based on the validation, whether a digit check error exists with respect to the at least one input value. 3. The computer program product of claim 2 , wherein based on the no-validation indicator being set to the defined value, the processing processes the output result of the digit validation check to indicate no digit check error, regardless of whether the output result of the digit validation check indicates that a digit check error exists. 4. The computer program product of claim 3 , wherein the digit check error indicator output by the executing comprises the processed output result of the digit validation check indicating no digit check error. 5. The computer program product of claim 2 , wherein, based on the no-validation indicator being set to the defined value, the processing further comprises feeding a selected at least one predefined value, other than the at least one input value, as input into the digit validation check, wherein the at least one predefined input is selected based on the digit validation check being configured for the output result thereof to indicate no digit check error, and wherein the digit check error indicator output by the executing comprises the output result of the digit validation check indicating no digit check error. 6. The computer program product of claim 1 , wherein based on the no-validation indicator being set to the defined value, a digit validation check on the at least one input value to validate whether the at least one input value comprises numerical digits in defined positions is bypassed. 7. The computer program product of claim 1 , wherein the at least one input value comprises at least one binary coded decimal number. 8. The computer program product of claim 1 , wherein the no-validation indicator is located in a field of the instruction. 9. The computer program product of claim 1 , wherein the performing processing uses the no-validation control indicator as an input to hardware that sets the digit check error indicator to indicate no digit check error. 10. The computer program product of claim 1 , wherein the defined value is a first value, and wherein based on the no-validation indicator being set to a second value different from the first value, the digit validation check control is disabled and the processing comprises: performing a digit validation check on the at least one input value, the digit validation check to validate whether the at least one input value comprises numerical digits in defined positions and to output a result indicating, based on the validation, whether a digit check error exists with respect to the at least one input value; and using, as the digit check error indicator output by the executing, the result of the digit validation check. 11. A computer system for facilitating processing within a computing environment, the computer system comprising: a memory; and a processor coupled to the memory, wherein the computer system is configured to perform a method comprising: obtaining an instruction to perform one or more operations using at least one input value, the instruction being a single architected instruction, and the instruction comprising a no-validation indicator for controlling whether digit validation check control is enabled for execution of the instruction; and executing the instruction, the executing comprising: determining, based on the no-validation indicator, whether digit validation check control is enabled for execution of the instruction; and performing processing based on the determining, wherein based on the no-validation indicator being set to a defined value, digit validation check control is enabled and the processing comprises forcing a digit check error indicator output by the executing to indicate no digit check error with respect to the at least one input value. 12. The computer system of claim 11 , wherein the executing further comprises performing a digit validation check on the at least one input value, the digit validation check to validate whether the at least one input value comprises numerical digits in defined positions and to output a result indicating, based on the validation, whether a digit check error exists with respect to the at least one input value. 13. The computer system of claim 12 , wherein based on the no-validation indicator being set to the defined value, the processing processes the output result of the digit validation check to indicate no digit check error, regardless of whether the output result of the digit validation check indicates that a digit check error exists, and wherein the digit check error indicator output by the executing comprises the processed output result of the digit validation check indicating no digit check error. 14. The computer system of claim 12 , wherein, based on the no-validation indicator being set to the defined value, the processing further comprises feeding a selected at least one predefined value, other than the at least one input value, as input into the digit validation check, wherein the at least one predefined input is selected based on the digit validation check being configured for the output result thereof to indicate no digit check error, and wherein the digit check error indicator output by the executing comprises the output result of the digit validation check indicating no digit check error. 15. The computer system of claim 11 , wherein the at least one input value comprises at least one binary coded decimal number. 16. The computer system of claim 11 , wherein the performing processing uses the no-validation control indicator as an input to hardware that sets the digit check error indicator to indicate no digit check error. 17. A computer-implemented method of facilitating processing within a computing environment, the computer-implemented method comprising: obtaining an instruction to perform one or more operations using at least one input value, the instruction being a single architected instruction, and the instruction comprising a no-validation indicator for controlling whether digit validation check control is enabled for execution of the instruction; and executing the instruct

Assignees

Inventors

Classifications

  • Result writeback, i.e. updating the architectural state or memory · CPC title

  • Non-specified BCD representation · CPC title

  • Bypassing or disabling error detection or correction · CPC title

  • Recovery, e.g. branch miss-prediction, exception handling (error detection or correction G06F11/00) · CPC title

  • Condition code generation, e.g. Carry, Zero flag · CPC title

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What does patent US11099853B2 cover?
Digit validation check control for execution of an instruction. A process obtains an instruction to perform operation(s) using input value(s). The instruction includes a no validation indicator for controlling whether digit validation check control is enabled for execution of the instruction. The process executes the instruction, including determining, based on the no validation indicator, whet…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F11/1052. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 24 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 9 related publications on this page (citations in our corpus or others sharing the same primary CPC).