Electronic display apparatus to mitigate visibility of terminal wiring in non-display area

Patent metadata

Field	Value
Publication number	US-11099417-B2
Application number	US-202016739829-A
Country	US
Kind code	B2
Filing date	Jan 10, 2020
Priority date	Feb 22, 2019
Publication date	Aug 24, 2021
Grant date	Aug 24, 2021

Abstract

An electronic apparatus including a base substrate that includes an active area and a peripheral area adjacent to the active area, a plurality of pixels that are disposed in the active area, a plurality of pads that are disposed in the peripheral area, fan-out lines that are disposed in the peripheral area and connect the pixels and the pads, and an anti-reflection layer that includes an active portion and a peripheral portion. The active portion overlaps the active area and includes a plurality of color patterns respectively overlapping the pixels, and the peripheral portion overlaps the peripheral area. The anti-reflection layer overlaps at least a part of the fan-out lines.

First claim

What is claimed is:

1. An electronic apparatus comprising:
a base substrate including an active area and a peripheral area adjacent to the active area;
a plurality of pixels disposed in the active area;
a plurality of pads disposed in the peripheral area;
fan-out lines disposed in the peripheral area and connecting the plurality of pixels and the plurality of pads; and
an anti-reflection layer including an active portion and a peripheral portion,
wherein the active portion overlaps the active area and comprises a plurality of color patterns respectively overlapping the plurality of pixels, and the peripheral portion overlaps the peripheral area, and
wherein the anti-reflection layer overlaps at least a part of the fan-out lines.

2. The electronic apparatus of claim 1 , wherein the base substrate comprises a non-bending portion including the active area, and a bending portion bent from the non-bending portion around a bending axis, and
wherein each of the fan-out lines comprises a first portion disposed in the non-bending portion and a second portion disposed in the bending portion.

3. The electronic apparatus of claim 2 , wherein the first portion overlaps the peripheral portion.

4. The electronic apparatus of claim 1 , wherein the plurality of color patterns are arranged not to overlap each other.

5. The electronic apparatus of claim 4 , wherein the active portion further comprises a black matrix interposed between the plurality of color patterns.

6. The electronic apparatus of claim 4 , wherein two of the plurality of color patterns that are adjacent to each other have different colors.

7. The electronic apparatus of claim 1 , wherein the peripheral portion has a single color.

8. The electronic apparatus of claim 7 , wherein the peripheral portion has substantially black color.

9. The electronic apparatus of claim 7 , wherein the peripheral portion comprises a plurality of patterns that have different colors and are stacked.

10. The electronic apparatus of claim 1 , wherein each of the fan-out lines comprises:
a first portion extending in a diagonal direction with respect to a direction in which the plurality of pads are arranged; and
a second portion extending in a perpendicular direction with respect to the direction in which the plurality of pads are arranged,
wherein the peripheral portion overlaps the first portion.

11. The electronic apparatus of claim 1 , wherein a light transmittance of the peripheral portion is about 10% or less.

12. The electronic apparatus of claim 1 , further comprising:
an encapsulation layer disposed on the plurality of pixels and overlapping the active area and the peripheral area,
wherein the anti-reflection layer is directly disposed on the encapsulation layer.

13. The electronic apparatus of claim 1 , further comprising:
an input sensing unit disposed on the plurality of pixels to sense an external input,
wherein the input sensing unit comprises:
a plurality of sensing patterns disposed in the active area; and
a plurality of sensing lines disposed in the peripheral area and connected to the plurality of sensing patterns.

14. The electronic apparatus of claim 13 , wherein the anti-reflection layer is interposed between the input sensing unit and the plurality of pixels.

15. The electronic apparatus of claim 14 , wherein the input sensing unit further includes a light blocking pattern covering the sensing patterns,
wherein each of the plurality of sensing patterns comprises a plurality of mesh lines, and
wherein the light blocking pattern is disposed along the plurality of mesh lines.

16. The electronic apparatus of claim 13 , wherein the anti-reflection layer is disposed on the input sensing unit.

17. An electronic apparatus comprising:
a display unit including a plurality of pixels disposed in an active area, a plurality of signal lines connected to the plurality of pixels, pads disposed in a pad area, and fan-out lines connecting the plurality of signal lines and the pads; and
an anti-reflection layer disposed on the display unit, and including an active portion including a plurality of color patterns arranged adjacent to each other and a peripheral portion having a single color,
wherein the anti-reflection layer overlaps at least a part of the fan-out lines.

18. The electronic apparatus of claim 17 , wherein each of the fan-out lines comprises:
a first portion extending in a diagonal direction with respect to a direction in which the pads are arranged; and
a second portion extending in a perpendicular direction with respect to the direction in which the pads are arranged,
wherein the peripheral portion overlaps the first portion.

19. The electronic apparatus of claim 17 , further comprising:
an input sensing unit disposed on the display unit and including a plurality of sensing patterns and a plurality of sensing lines connected with the plurality of sensing patterns,
wherein the anti-reflection layer is interposed between the input sensing unit and the display unit.

20. The electronic apparatus of claim 17 , wherein a light transmittance of the peripheral portion is about 10% or less.

Assignees

• Samsung Display Co Ltd

Inventors

• Lee Minsu
• Ki Wonjang
• Noh Dae-Hyun
• Park Yongsung
• Lee Seungbin

Classifications

• H10K59/8792

  comprising light absorbing layers, e.g. black layers · CPC title

• H10K59/8791

  Arrangements for improving contrast, e.g. preventing reflection of ambient light · CPC title

• G02F1/133502 Primary

  Antiglare, refractive index matching layers · CPC title

• H10K59/131 Primary

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10H20/84

  Coatings, e.g. passivation layers or antireflective coatings · CPC title