Amplifier with low drift biasing

Patent metadata

Field	Value
Publication number	US-11095260-B2
Application number	US-201916535194-A
Country	US
Kind code	B2
Filing date	Aug 8, 2019
Priority date	Dec 24, 2018
Publication date	Aug 17, 2021
Grant date	Aug 17, 2021

Abstract

An amplifier includes an input transistor, an input terminal, a first current source, a cascode transistor, and a second current source. The input transistor is coupled to the input terminal. The first current source is coupled to the input transistor and is configured to provide a bias current to the input transistor that is proportional to absolute temperature. The cascode transistor is coupled to the input transistor. The second current source is coupled to the cascode transistor and is configured to provide a bias current to the cascode transistor that is complementary to absolute temperature.

First claim

What is claimed is:

1. An amplifier, comprising:
an input transistor coupled to an input terminal;
a first current source coupled to the input transistor, the first current source configured to provide a bias current to the input transistor that is proportional to absolute temperature;
a cascode transistor coupled to the input transistor; and
a second current source coupled to the cascode transistor, the second current source configured to provide a bias current to the cascode transistor that is complementary to absolute temperature;
further comprising a diode connected transistor coupled to the cascode transistor and the second current source.

2. An amplifier, comprising:
an input transistor coupled to an input terminal;
a first current source coupled to the input transistor, the first current source configured to provide a bias current to the input transistor that is proportional to absolute temperature;
a cascode transistor coupled to the input transistor; and

a second current source coupled to the cascode transistor, the second current source configured to provide a bias current to the cascode transistor that is complementary to absolute temperature;
wherein:
the input transistor is a first input transistor;
the input terminal is a first input terminal; and
the amplifier further comprises a second input transistor coupled to a second input terminal and the first current source;
wherein:
the cascode transistor is a first cascode transistor; and
the amplifier further comprises a second cascode transistor coupled to the second input transistor.

3. The amplifier of claim 2 , further comprising a third current source coupled to the second cascode transistor, the third current source configured to provide a bias current to the second cascode transistor that is complementary to absolute temperature.

4. The amplifier of claim 3 , further comprising a diode connected transistor coupled to the second cascode transistor and the third current source.

5. The amplifier of claim 2 , further comprising a current mirror circuit coupled to the first cascode transistor and the second cascode transistor.

6. The amplifier of claim 2 further comprising a diode connected transistor coupled to the second current source, the first cascode transistor, and the second cascode transistor.

7. An amplifier, comprising:
an input transistor coupled to an input terminal;
a first current source coupled to the input transistor, the first current source configured to provide a bias current to the input transistor that is proportional to absolute temperature;
a cascode transistor coupled to the input transistor; and
a second current source coupled to the cascode transistor, the second current source configured to provide a bias current to the cascode transistor that is complementary to absolute temperature;
wherein the second current source comprises:
a third current source configured to generate a current that is proportional to absolute temperature;
a bipolar transistor coupled to the third current source.

8. An amplifier, comprising:
a first input terminal;
a second input terminal;
a first input transistor comprising a first terminal coupled to the first input terminal;
a second input transistor comprising:
a first terminal coupled to the second input terminal; and
a second terminal coupled to a second terminal of the first input transistor;

a first current source coupled to the second terminal of the second input transistor, and configured to provide a bias current to the first input transistor and the second input transistor that is proportional to absolute temperature;
a first cascode transistor comprising a first terminal coupled to a third terminal of the first input transistor;
a second cascode transistor comprising a first terminal coupled to a third terminal of the second input transistor; and

a second current source coupled to the second cascode transistor, and configured to provide a bias current to the second cascode transistor that is complementary to absolute temperature;
further comprising:
a diode connected transistor comprising:
a first terminal coupled to the second current source; and
a second terminal coupled to the second current source, a second terminal of the first cascode transistor, and a second terminal of the second cascode transistor.

9. An amplifier, comprising:
a first input terminal;
a second input terminal;
a first input transistor comprising a first terminal coupled to the first input terminal;
a second input transistor comprising:
a first terminal coupled to the second input terminal; and
a second terminal coupled to a second terminal of the first input transistor;

a first current source coupled to the second terminal of the second input transistor, and configured to provide a bias current to the first input transistor and the second input transistor that is proportional to absolute temperature;
a first cascode transistor comprising a first terminal coupled to a third terminal of the first input transistor;
a second cascode transistor comprising a first terminal coupled to a third terminal of the second input transistor; and

a second current source coupled to the second cascode transistor, and configured to provide a bias current to the second cascode transistor that is complementary to absolute temperature;
further comprising:
a current mirror circuit comprising:
a first transistor connected as a diode, and comprising a first terminal coupled to a second terminal of the first cascode transistor and a second terminal of the first transistor of the current mirror circuit;
a second transistor comprising:
a first terminal coupled to a second terminal of the second cascode transistor; and
a second terminal coupled to the second terminal of the first transistor of the current mirror circuit.

10. An amplifier, comprising:
a first input terminal;
a second input terminal;
a first input transistor comprising a first terminal coupled to the first input terminal;
a second input transistor comprising:
a first terminal coupled to the second input terminal; and
a second terminal coupled to a second terminal of the first input transistor;

a first current source coupled to the second terminal of the second input transistor, and configured to provide a bias current to the first input transistor and the second input transistor that is proportional to absolute temperature;
a first cascode transistor comprising a first terminal coupled to a third terminal of the first input transistor;
a second cascode transistor comprising a first terminal coupled to a third terminal of the second input transistor; and

a second current source coupled to the second cascode transistor, and configured to provide a bias current to the second cascode transistor that is complementary to absolute temperature;
further comprising a diode connected transistor comprising:
a first terminal coupled to the second current source; and
a second terminal coupled to a second terminal of the second cascode transistor and the second current source.

11. An amplifier, comprising:
a first input terminal;
a second input terminal;
a first input transistor comprising a first terminal coupled to the first input terminal;
a second input transistor comprising:
a first terminal coupled to the second input terminal; and
a second terminal coupled to a second terminal of the first input transistor;

a first current source coupled to the second terminal of the second input transistor, and configured to provide a bias current to the first input transistor and the second input transistor that is proportional to absolute

Assignees

• Texas Instruments Inc

Inventors

• Singh Ravpreet

Classifications

• H03F2203/45041

  Fuses are blown to balance the dif amp to reduce the offset of the dif amp · CPC title

• H03F3/45094 Primary

  Folded cascode stages · CPC title

• H03F2203/45322

  One or more current sources are added to the AAC · CPC title

• H03F1/0211

  with control of the supply voltage or current · CPC title

• H03F3/45085 Primary

  Long tailed pairs (H03F3/45112, H03F3/45139 take precedence) · CPC title