Method and apparatus for common-mode voltage cancellation

US11095202B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-11095202-B1
Application numberUS-202016902920-A
CountryUS
Kind codeB1
Filing dateJun 16, 2020
Priority dateJun 16, 2020
Publication dateAug 17, 2021
Grant dateAug 17, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A common-mode voltage cancellation (CMVC) circuit, is disclosed. The circuit includes a first set of coupled inductors, each having a primary winding defining a first polarity, and a secondary winding. The secondary windings are electrically coupled in series. Each primary winding receives a phase voltage having a common mode voltage component from a respective input line. The circuit includes a second set of coupled inductors comprising at least one primary winding and at least one secondary winding The at least one primary winding receives a second voltage from the series connected secondary windings of the first set of coupled inductors. Each at least one secondary winding is coupled in series with a respective input line such that the common mode voltage component received on input lines will be reduced at an output of the set of secondary windings.

First claim

Opening claim text (preview).

What is claimed is: 1. A common-mode voltage cancellation (CMVC) circuit, comprising: a first set of coupled inductors, each coupled inductor of the first set of coupled inductors having a respective primary winding, and a respective secondary winding, each primary winding of the first set of coupled inductors configured to receive a respective first phase voltage having a common mode voltage component from a corresponding input line, wherein the respective secondary windings of the first set of coupled inductors are electrically coupled in series; and a second set of coupled inductors comprising at least one primary winding in signal communication with the series connected secondary windings of the first set of coupled inductors to receive a second voltage therefrom, the second set of coupled inductors further comprising at least one secondary winding, each at least one secondary winding coupled in series with a respective input line and to a respective output line, electrically downstream from the respective input line. 2. The CMVC circuit of claim 1 wherein a relative polarity of the primary and secondary windings of the first set of coupled inductors is opposite a relative polarity of the primary and secondary windings of the second set of coupled inductors. 3. The CMVC circuit of claim 2 , wherein the respective first phase voltage having a common mode voltage component is also received by the respective secondary windings of the second set of coupled inductors. 4. The CMVC circuit of claim 3 , wherein a summed voltage across the series connected secondary windings of the first set of coupled inductors is proportional to the common mode voltage component. 5. The CMVC circuit of claim 4 , wherein an induced voltage at the respective secondary windings of the second set of coupled inductors is out of phase with the common mode voltage component. 6. The CMVC circuit of claim 5 wherein the voltage across each respective secondary winding of the second set of coupled inductors is proportional to a sum of the respective first phase voltages and the common mode voltage component. 7. The CMVC circuit of claim 4 wherein the voltage provided to each respective output line by the respective secondary windings of the second set of coupled inductors is equal to the respective first phase voltage with the common mode voltage component reduced therefrom. 8. The CMVC circuit of claim 1 , wherein the CMVC circuit is a polyphase AC circuit having a number of electrical phases, and wherein the second set of coupled inductors comprises at least N coupled inductors, wherein N is equal to the number of electrical phases in the CMVC circuit. 9. The CMVC circuit of claim 1 , further comprising at least one of a capacitor and a resistor electrically coupled in series between the series-connected first coupled inductor secondaries and the at least one primary of the second set of coupled inductors. 10. The CMVC circuit of claim 1 , further comprising at least one of a set of capacitors and a set of resistors, each respective capacitor and resistor coupled electrically in series with a primary winding of a respective coupled inductor of the first set of coupled inductors. 11. The CMVC circuit of claim 1 , wherein each respective output line is in signal communication with an LC filter. 12. A method of cancelling a common-mode voltage in a circuit, comprising: coupling a respective primary winding of a first set of coupled inductors in signal communication with a respective input line to receive a respective first phase voltage having a common-mode voltage component therefrom, wherein each coupled inductor of the first set of coupled inductors comprises a primary winding and a corresponding secondary winding; coupling the secondary windings of the first set of coupled inductors electrically in series; coupling at least one primary winding of a second set of coupled inductors in signal communication with the series-coupled secondary windings of the first set of coupled inductors to receive a second voltage therefrom, wherein the second set of coupled inductors comprises at least one secondary winding; inducing a respective third voltage at the respective secondary windings of the second set of coupled inductors that is out of phase from the second voltage; coupling the at least one secondary winding of the second set of coupled inductors in series with a respective input line to receive the respective first phase voltage having the common-mode voltage component therefrom; and coupling the respective secondary windings of the second set of coupled inductors in series with a respective output line to provide a respective fourth voltage thereto. 13. The method of claim 12 , wherein a relative polarity of the primary and secondary windings of the first set of coupled inductors is opposite a relative polarity of the primary and secondary windings of the second set of coupled inductors. 14. The method of claim 13 , wherein the respective first phase voltage having the common-mode voltage component is also received by the respective secondary windings of the second set of coupled inductors. 15. The method of claim 14 , wherein a voltage across the series connected secondary windings of the first set of coupled inductors is proportional to the common mode voltage component. 16. The method of claim 15 , wherein the induced respective third voltage at the respective secondary windings of the second set of coupled inductors is out of phase with the common mode voltage component. 17. The method of claim 16 , wherein the voltage across each respective secondary winding of the second set of coupled inductors comprises a sum of the respective first phase voltage with the common mode voltage component, and the induced voltage at the respective secondary windings of the second set of coupled inductors. 18. The method of claim 17 , further comprising, providing to each respective output line the respective fourth respective voltage that is equal to the respective first phase voltage with the common mode voltage component reduced therefrom. 19. The method of claim 12 , further comprising coupling a capacitor electrically in series between the series coupled secondary windings of the first set of coupled inductors and the at least one primary winding of the second set of coupled inductors. 20. The method of claim 12 , further comprising coupling a capacitor electrically in series between each respective input line and the respective primary winding of the first set of coupled inductors.

Assignees

Inventors

Classifications

  • by pulse-width modulation · CPC title

  • H02M1/12Primary

    Arrangements for reducing harmonics from AC input or output · CPC title

  • using discharge tubes with control electrode or semiconductor devices with control electrode · CPC title

  • H02M1/123Primary

    Suppression of common mode voltage or current · CPC title

  • Circuits or arrangements for compensating for electromagnetic interference in converters or inverters · CPC title

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What does patent US11095202B1 cover?
A common-mode voltage cancellation (CMVC) circuit, is disclosed. The circuit includes a first set of coupled inductors, each having a primary winding defining a first polarity, and a secondary winding. The secondary windings are electrically coupled in series. Each primary winding receives a phase voltage having a common mode voltage component from a respective input line. The circuit includes …
Who is the assignee on this patent?
Ge Aviation Systems Llc
What technology area does this patent fall under?
Primary CPC classification H02M1/12. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 17 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).