A method and device concerning iii-nitride edge emitting laser diode of high confinement factor with lattice matched cladding layer
US-2018152003-A1 · May 31, 2018 · US
US11095096B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11095096-B2 |
| Application number | US-201514687814-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 15, 2015 |
| Priority date | Apr 16, 2014 |
| Publication date | Aug 17, 2021 |
| Grant date | Aug 17, 2021 |
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Methods and structures for forming vertical-cavity light-emitting devices are described. An n-side or bottom-side layer may be laterally etched to form a porous semiconductor region and converted to a porous oxide. The porous oxide can provide a current-blocking and guiding layer that aids in directing bias current through an active area of the light-emitting device. Distributed Bragg reflectors may be fabricated on both sides of the active region to form a vertical-cavity surface-emitting laser. The light-emitting devices may be formed from III-nitride materials.
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What is claimed is: 1. A semiconductor light-emitting device comprising: a substrate; an active region comprising semiconductor material, wherein the active region has a first area and at least a portion of the active region is configured for carrier recombination; a doped semiconductor region comprising a first portion of a layer having a thickness and located between the active region and the substrate, the doped semiconductor region having a second area smaller than the first area; and a porous oxide region formed from a second portion of the layer and extending around the doped semiconductor region and located between the active region and the substrate, wherein the porous oxide comprises pores extending laterally into the second portion of the layer, and wherein the porous oxide is porous gallium oxide. 2. The semiconductor light-emitting device of claim 1 , wherein the active region and doped semiconductor region comprise III-nitride material. 3. The semiconductor light-emitting device of claim 2 , wherein the active region is configured to produce photons when electrical current flows through the active region. 4. The semiconductor light-emitting device of claim 1 , wherein the porous oxide region is formed in and from a same layer of material as the doped semiconductor region. 5. The semiconductor light-emitting device of claim 1 , wherein the doped semiconductor region comprises n-type conductivity material. 6. The semiconductor light-emitting device of claim 1 , wherein the active region comprises multiple quantum wells formed from layers of III-nitride material. 7. The semiconductor light-emitting device of claim 1 , further comprising a conductive layer of semiconductor material formed between the doped semiconductor region and the substrate, wherein a doping density of the conductive layer is less than a doping density of the doped semiconductor region. 8. The semiconductor light-emitting device of claim 7 , further comprising an undoped semiconductor layer between the conductive layer of semiconductor material and the substrate. 9. The semiconductor light-emitting device of claim 7 , wherein a doping density of the conductive layer is between approximately 5×10 17 cm −3 and approximately 2×10 18 cm −3 and a doping density of the doped semiconductor region is between approximately 3×10 18 cm −3 and approximately 1×10 19 cm −3 . 10. The semiconductor light-emitting device of claim 1 , further comprising a first distributed Bragg reflector located between the doped semiconductor region and the substrate. 11. The semiconductor light-emitting device of claim 10 , wherein the first distributed Bragg reflector comprises alternating layers of air and III-nitride material. 12. The semiconductor light-emitting device of claim 10 , further comprising at least one undoped semiconductor layer between the doped semiconductor region and the first distributed Bragg reflector. 13. The semiconductor light-emitting device of claim 10 , further comprising: a conductive layer having a doping density between approximately 5×10 17 cm −3 and approximately 2×10 18 cm −3 located between the doped semiconductor region and the first distributed Bragg reflector; and an undoped semiconductor layer between the conductive layer and the first distributed Bragg reflector, wherein a doping density of the doped semiconductor region is between approximately 3×10 18 cm −3 and approximately 1×10 19 cm −3 . 14. The semiconductor light-emitting device of claim 10 , further comprising a second distributed Bragg reflector located on a side of the active region away from the substrate. 15. The semiconductor light-emitting device of claim 14 , wherein the second distributed Bragg reflector comprises layers of dielectric material. 16. The semiconductor light-emitting device of claim 1 , wherein the porous oxide region has pore sizes less than approximately one micron. 17. The semiconductor light-emitting device of claim 1 , wherein the porous oxide region has a range of pore sizes between approximately 20 nm and approximately 200 nm. 18. A method for making an integrated light-emitting device, the method comprising: forming a mesa on a substrate that comprises an active region comprising semiconductor material, wherein the active region has a first area and at least a portion of the active region is configured for carrier recombination, and a doped semiconductor region comprising a first portion of a layer having a thickness and located between the active region and the substrate, the doped semiconductor region having a second area smaller than the first area; forming a porous oxide region from a second portion of the layer extending around the doped semiconductor region and located between the active region and the substrate, wherein the porous oxide comprises pores extending laterally into the second portion of the layer, and wherein the porous oxide is porous gallium oxide, wherein forming the porous oxide region comprises: etching the layer to form a porous region; and converting the porous region to porous oxide. 19. The method of claim 18 , wherein forming the doped semiconductor region comprises epitaxially growing an n-type conductivity layer of III-nitride material. 20. The method of claim 18 , further comprising forming a conductive layer of semiconductor material adjacent the doped semiconductor region, wherein a doping density of the conductive layer is less than a doping density of the doped semiconductor region. 21. The method of claim 20 , further comprising: forming the doped semiconductor region and conductive layer from III-nitride material; doping the conductive layer with a doping density between approximately 5×10 17 cm −3 and approximately 2×10 18 cm −3 ; and doping the doped semiconductor region with a doping density between approximately 3×10 18 cm −3 and approximately 1×10 19 cm −3 . 22. The method of claim 18 , wherein the etching comprises electrochemical etching with a hydrofluoric-based etchant. 23. The method of claim 22 , wherein the etching further comprises applying a bias between approximately 7 volts and approximately 20 volts between the doped semiconductor region and an electrode in the etchant. 24. The method of claim 18 , wherein the active region is configured to produce photons when electrical current flows through the active region. 25. The method of claim 24 , wherein forming the active region comprises forming multiple quantum wells from layers of III-nitride material. 26. The method of claim 18 , further comprising forming a first distributed Bragg reflector located between the doped semiconductor region and the substrate. 27. The method of claim 26 , wherein forming the first distributed Bragg reflector comprises: epitaxially growing at least one layer of n-type III-nitride semiconductor material and at least one layer of undoped III-nitride semiconductor material; etching a hole adjacent the mesa to expose sidewalls of n-type III-nitride semiconductor material; and electrochemically etching at least a portion of the at least one layer of n-type III-nitride semiconductor material to form at least one air gap between the doped semiconductor region and the substrate. 28. The method of claim 27 , wherein the at least one layer of n-type III-nitride semiconductor material comprises GaN and have a doping density
Porous materials · CPC title
containing nitrogen, e.g. GaN · CPC title
Current-blocking structures · CPC title
characterised by the crystal structures or orientations, e.g. polycrystalline, amorphous or porous · CPC title
having specific optical properties, e.g. transparent electrodes · CPC title
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