Phase change memory with doped silicon germanium alloy-containing electrodes and air gap-containing spacer
US-2020006652-A1 · Jan 2, 2020 · US
US11095042B1 · US · B1
| Field | Value |
|---|---|
| Publication number | US-11095042-B1 |
| Application number | US-202016789593-A |
| Country | US |
| Kind code | B1 |
| Filing date | Feb 13, 2020 |
| Priority date | Feb 13, 2020 |
| Publication date | Aug 17, 2021 |
| Grant date | Aug 17, 2021 |
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A dielectric element includes a bottom surface, a top surface, and a plurality of cells formed vertically between the bottom surface and the top surface. Each cell of the plurality of cells includes a cell sidewall that extends below the top surface toward the bottom surface. The cell sidewall forms an aperture in the top surface and tapers from the top surface toward a center of a respective cell. Each cell sidewall is formed of a dielectric material.
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What is claimed is: 1. A dielectric element comprising: a bottom surface; a top surface; and a plurality of cells formed vertically between the bottom surface and the top surface, wherein each cell of the plurality of cells comprises: a cell sidewall that extends below the top surface toward the bottom surface, wherein the cell sidewall forms an aperture in the top surface, wherein the cell sidewall tapers from the top surface toward a center of a respective cell, and wherein each cell sidewall is formed of a dielectric material. 2. The dielectric element of claim 1 , wherein a dielectric constant of the dielectric material changes in a plane parallel to the top surface. 3. The dielectric element of claim 1 , wherein a dielectric constant of the dielectric material changes in a plane perpendicular to the top surface. 4. The dielectric element of claim 1 , wherein each cell sidewall is formed of a plurality of different dielectric materials, and wherein the dielectric material is one of the plurality of different dielectric materials. 5. The dielectric element of claim 1 , further comprising an element sidewall formed between the bottom surface and the top surface surrounding the plurality of cells on at least one side. 6. The dielectric element of claim 5 , wherein the element sidewall forms a polygon in a plane parallel to the top surface. 7. The dielectric element of claim 5 , wherein the element sidewall forms an ellipse in a plane parallel to the top surface. 8. The dielectric element of claim 1 , wherein each cell sidewall forms a polygon in a plane parallel to the top surface. 9. The dielectric element of claim 1 , wherein each cell sidewall forms an ellipse in a plane parallel to the top surface. 10. The dielectric element of claim 1 , wherein the taper of each cell sidewall is vertical. 11. The dielectric element of claim 1 , wherein the taper of each cell sidewall has a linear slope between vertical and horizontal. 12. The dielectric element of claim 11 , wherein the linear slope changes at discrete levels between the top surface and the bottom surface. 13. The dielectric element of claim 1 , wherein the taper of each cell sidewall is curved. 14. The dielectric element of claim 13 , wherein a curvature of the curved taper is defined by a polynomial. 15. The dielectric element of claim 13 , wherein a curvature of the curved taper changes at discrete levels between the top surface and the bottom surface. 16. The dielectric element of claim 1 , wherein the dielectric element is solid between the cell sidewalls of adjacent cells of the plurality of cells. 17. The dielectric element of claim 1 , wherein the cell sidewall of each cell extends through the bottom surface to form a bottom aperture in the bottom surface. 18. An antenna comprising: a dielectric element comprising: a bottom surface; a top surface; and a plurality of cells formed vertically between the bottom surface and the top surface, wherein each cell of the plurality of cells comprises: a cell sidewall that extends below the top surface toward the bottom surface, wherein the cell sidewall forms an aperture in the top surface, wherein the cell sidewall tapers from the top surface toward a center of a respective cell, and wherein each cell sidewall is formed of a dielectric material; a conductive layer including a top conductive surface and a bottom conductive surface, wherein the top conductive surface is on an opposite side of the first conductive layer relative to the bottom conductive surface, wherein the top conductive surface is mounted to the bottom surface of the dielectric element, and wherein the conductive layer is formed of a first conductive material; a conducting pattern layer mounted to the top surface of the dielectric element, wherein the conducting pattern layer is formed of a second conductive material; and a plurality of vertical interconnect accesses (vias), wherein each via of the plurality of vias is formed of a third conductive material that extends through the dielectric element from the bottom surface to the top surface, wherein each via of the plurality of vias is connected to the conducting pattern layer, and wherein a first via is configured to provide a first voltage value to the conducting pattern layer and a second via is configured to provide a second voltage value, different than the first voltage value, to the conducting pattern layer. 19. The antenna of claim 18 , wherein a dielectric constant of the dielectric material changes in a plane parallel to the top surface. 20. An antenna array comprising: a transmitter; a plurality of antennas mounted to a surface to form an array, wherein each antenna of the plurality of antennas is mounted to receive electrical energy from the transmitter, and wherein each antenna of the plurality of antennas comprises a dielectric element comprising: a bottom surface; a top surface; and a plurality of cells formed vertically between the bottom surface and the top surface, wherein each cell of the plurality of cells comprises: a cell sidewall that extends below the top surface toward the bottom surface, wherein the cell sidewall forms an aperture in the top surface, wherein the cell sidewall tapers from the top surface toward a center of a respective cell, and wherein each cell sidewall is formed of a dielectric material; a conductive layer including a top conductive surface and a bottom conductive surface, wherein the top conductive surface is on an opposite side of the first conductive layer relative to the bottom conductive surface, wherein the top conductive surface is mounted to the bottom surface of the dielectric element, and wherein the conductive layer is formed of a first conductive material; a conducting pattern layer mounted to the top surface of the dielectric element, wherein the conducting pattern layer is formed of a second conductive material; and a plurality of vertical interconnect accesses (vias), wherein each via of the plurality of vias is formed of a third conductive material that extends through the dielectric element from the bottom surface to the top surface, wherein each via of the plurality of vias is connected to the conducting pattern layer, and wherein a first via is configured to provide a first voltage value to the conducting pattern layer and a second via is configured to provide a second voltage value, different than the first voltage value, to the conducting pattern layer under control of the transmitter.
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