Layer-selective laser ablation patterning
US-9209400-B2 · Dec 8, 2015 · US
US11094899B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11094899-B2 |
| Application number | US-201716331006-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 6, 2017 |
| Priority date | Sep 16, 2016 |
| Publication date | Aug 17, 2021 |
| Grant date | Aug 17, 2021 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Provided is a method for manufacturing a field-effect transistor, the method including the steps of: forming a gate electrode on the surface of a substrate; forming a gate insulating layer on the gate electrode; forming a conductive film containing a conductor and a photosensitive organic component by a coating method on the gate insulating layer; exposing the conductive film from the rear surface side of the substrate with the gate electrode as a mask; developing the exposed conductive film to form a source electrode and a drain electrode; and forming a semiconductor layer by a coating method between the source electrode and the drain electrode. This method makes it possible to provide an FET, a semiconductor device, and an RFID which can be prepared by a simple process, and which have a high mobility, and have a gate electrode and source/drain electrodes aligned with a high degree of accuracy.
Opening claim text (preview).
The invention claimed is: 1. A method for manufacturing a field-effect transistor, the method comprising the steps of: forming a gate electrode on a surface of a substrate; forming a gate insulating layer on the gate electrode; forming a conductive film containing a conductor and a photosensitive organic component by a coating method on the gate insulating layer; exposing the conductive film from a rear surface side of the substrate with the gate electrode as a mask; developing the exposed conductive film to form a source electrode and a drain electrode; and forming a semiconductor layer by a coating method between the source electrode and the drain electrode, wherein in the step of exposing the conductive film from the rear surface side of the substrate, the exposure light has any wavelength of 436 nm, 405 nm, or 365 nm, and an intensity I 0 of the exposure light and an intensity I of light passing through the substrate, and the electrode and the gate insulating layer formed on the substrate surface satisfy the following formula (a): −LOG 10 ( I/I 0 )≥2 (a); wherein the method further comprises a step of exposing the conductive film from a surface side of the substrate after the step of exposing the conductive film from the rear surface side of the substrate. 2. The method for manufacturing a field-effect transistor according to claim 1 , wherein the gate electrode is formed by a coating method. 3. The method for manufacturing a field-effect transistor according to claim 1 , wherein the semiconductor layer comprises a carbon nanotube. 4. The method for manufacturing a field-effect transistor according to claim 1 , wherein the substrate is 200 μm or less in thickness. 5. The method for manufacturing a field-effect transistor according to claim 1 , wherein the gate insulating layer is 1 μm or less in film thickness. 6. The method for manufacturing a field-effect transistor according to claim 1 , wherein the photosensitive organic component comprises a compound having a urethane group. 7. The method for manufacturing a field-effect transistor according to claim 1 , wherein the semiconductor layer comprises a carbon nanotube composite with a conjugated polymer attached to at least a part of a surface of the carbon nanotube. 8. The method for manufacturing a field-effect transistor according to claim 1 , wherein the coating method for forming the semiconductor layer is any one selected from the group consisting of an ink-jet method, a dispenser method, and a spray method. 9. The method for manufacturing a field-effect transistor according to claim 1 , wherein the gate insulating layer comprises at least a polysiloxane containing a silane compound represented by the general formula (1) as a polymerized component: R 1 m Si(OR 2 ) 4-m (1) where R 1 represents a hydrogen atom, an alkyl group, a cycloalkyl group, a heterocyclic group, an aryl group, a heteroaryl group, or an alkenyl group, and in a case in which there is more than one R 1 , each R 1 may be identical or different, R 2 represents an alkyl group or a cycloalkyl group, and in a case in which there is more than one R 2 , each R 2 may be identical or different, and m represents an integer of 1 to 3. 10. The method for manufacturing a field-effect transistor according to claim 9 , wherein the polysiloxane further comprises a silane compound represented by the general formula (3) as a polymerized component: A 1 R 6 k Si(OR 7 ) 2-k (3) wherein in the general formula (3), R 6 represents a hydrogen atom, an alkyl group, a cycloalkyl group, a heterocyclic group, an aryl group, a heteroaryl group, or an alkenyl group, R 7 represents a hydrogen atom, an alkyl group, an acyl group, or an aryl group, k represents 0 or 1, A 1 represents an organic group containing at least two carboxyl groups, sulfo groups, thiol groups, phenolic hydroxyl groups, or derivatives thereof, subject to the proviso that in a case in which the derivative is a cyclic condensed structure from two of the carboxyl groups, the sulfo groups, the thiol groups, and the phenolic hydroxyl groups, A 1 represents an organic group having at least one of the cyclic condensed structures. 11. A method for manufacturing a wireless communication device, the method comprising the steps of: forming a field-effect transistor by the manufacturing method according to claim 1 ; and forming an antenna pattern on the surface of the substrate. 12. A method for manufacturing a field-effect transistor, the method comprising the steps of: forming a source electrode and a drain electrode on a surface of a substrate; forming a semiconductor layer by a coating method between the source electrode and the drain electrode; forming a gate insulating layer on the source electrode, the drain electrode, and the semiconductor layer; forming a conductive film containing a conductor and a photosensitive organic component by a coating method on the gate insulating layer; exposing the conductive film from a rear surface side of the substrate with the source electrode and the drain electrode as a mask; and developing the exposed conductive film to form a gate electrode. 13. The method for manufacturing a field-effect transistor according to claim 12 , wherein the source electrode and the drain electrode are formed by a coating method. 14. The method for manufacturing a field-effect transistor according to claim 12 , wherein the semiconductor layer comprises a carbon nanotube. 15. The method for manufacturing a field-effect transistor according to claim 12 , wherein in the step of exposing the conductive film from the rear surface side of the substrate, the exposure light has any wavelength of 436 nm, 405 nm, or 365 nm, and an intensity I 0 of the exposure light and an intensity I of light passing through the substrate, and the electrode and the gate insulating layer formed on the substrate surface satisfy the following formula (a): −LOG 10 ( I/I 0 )≥2 (a). 16. The method for manufacturing a field-effect transistor according to claim 12 , the method further comprising a step of exposing the conductive film from a surface side of the substrate after the step of exposing the conductive film from the rear surface side of the substrate. 17. A method for manufacturing a field-effect transistor, the method comprising the steps of: forming a gate electrode on a surface of a substrate; forming a gate insulating layer on the gate electrode; forming a conductive film containing a conductor and a photosensitive organic component by a coating method on the gate insulating layer; exposing the conductive film from a rear surface side of the substrate with the gate electrode as a mask; developing the exposed conductive film to form a source electrode and a drain electrode; and forming a semiconductor layer by a coating method between the source electrode and the drain electrode, wherein the semiconductor layer comprises a carbon nanotube composite with a conjugated polymer attached to at least a part of a surface of the carbon nanotube.
for antennas · CPC title
at high-frequency [HF] or radio frequency [RF] · CPC title
Electrodes · CPC title
Organic transistors · CPC title
characterised by the channel regions · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.