Semiconductor device

US11094691B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11094691-B2
Application numberUS-202016736463-A
CountryUS
Kind codeB2
Filing dateJan 7, 2020
Priority dateMar 7, 2019
Publication dateAug 17, 2021
Grant dateAug 17, 2021

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device includes a semiconductor substrate, and the semiconductor substrate is divided into an IGBT region, a diode region, and a MOSFET region. A drift layer of n−-type is provided in the semiconductor substrate. The drift layer is shared among the IGBT region, the diode region, and the MOSFET region. In the semiconductor substrate, the diode region is always disposed between the IGBT region and the MOSFET region to cause the IGBT region and the MOSFET region to be separated from each other without being adjacent to each other.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device including an IGBT region having an IGBT therein, a diode region having a diode therein, and a MOSFET region having a MOSFET therein, the semiconductor device comprising: a semiconductor substrate including first and second main surfaces; a drift layer of a first conductivity type provided in the semiconductor substrate; a base layer of a second conductivity type provided in the semiconductor substrate, the base layer being selectively disposed adjacent to the first main surface side relative to the drift layer; and an anode layer of the second conductivity type provided in the semiconductor substrate, the anode layer being selectively disposed adjacent to the first main surface side relative to the drift layer, wherein the drift layer is shared among the IGBT region, the diode region, and the MOSFET region, the base layer is shared between the IGBT region and the MOSFET region, and the anode layer is used in the diode region, the IGBT region and the MOSFET region each include a buried conductive layer buried in a region extending from the first main surface into the drift layer through the base layer with an insulating film interposed between the buried conductive layer and the base layer and the drift layer, the IGBT region and the MOSFET region each include a MOS gate structure where the buried conductive layer serves as a gate electrode, the insulating film serves as a gate insulating film, and the base layer serves as a channel region, and the diode region is disposed between the IGBT region and the MOSFET region to cause the IGBT region and the MOSFET region to be separated from each other without being adjacent to each other. 2. The semiconductor device according to claim 1 , wherein the diode region includes a dummy buried conductive layer buried in a region extending into the drift layer through the base layer with an insulating film interposed between the dummy buried conductive layer and the base layer and the drift layer. 3. The semiconductor device according to claim 2 , wherein the drift layer includes: an IGBT drift layer formed in the IGBT region; and a MOSFET drift layer formed in the MOSFET region, and at least part of the MOSFET drift layer includes a drift heavily doped region that is made higher in impurity concentration of the first conductivity type than the IGBT drift layer. 4. The semiconductor device according to claim 3 , wherein the drift heavily doped region is provided all over the MOSFET drift layer. 5. The semiconductor device according to claim 3 , wherein the IGBT drift layer includes, in a region in contact with the base layer, a carrier store region that is higher in impurity concentration of the first conductivity type than other regions of the IGBT drift layer, and the carrier store region and the drift heavily doped region are made identical to each other in both impurity concentration of the first conductivity type and formation depth. 6. The semiconductor device according to claim 2 , wherein in the IGBT region, the drift layer includes, in a region in contact with the base layer, a carrier store region that is higher in impurity concentration of the first conductivity type than other regions of the drift layer. 7. The semiconductor device according to claim 2 , wherein the buried conductive layer includes: at least one IGBT buried conductive layer formed in the IGBT region; and at least one MOSFET buried conductive layer formed in the MOSFET region, each of the at least one IGBT buried conductive layer is formed adjacent to and spaced apart from another IGBT buried conductive layer or the dummy buried conductive layer by an IGBT gap, each of the at least one MOSFET buried conductive layer is formed adjacent to and spaced apart from another MOSFET buried conductive layer or the dummy buried conductive layer by a MOSFET gap, and the MOSFET gap is made smaller than the IGBT gap. 8. The semiconductor device according to claim 2 , wherein the buried conductive layer includes an IGBT buried conductive layer formed in the IGBT region, and the IGBT buried conductive layer includes a plurality of partial IGBT buried conductive layers that are electrically separated from each other. 9. The semiconductor device according to claim 8 , wherein the buried conductive layer further includes a MOSFET buried conductive layer formed in the MOSFET region, the MOSFET buried conductive layer includes a plurality of partial MOSFET buried conductive layers that are electrically separated from each other, and the dummy buried conductive layer includes a plurality of partial dummy buried conductive layers that are electrically separated from each other. 10. The semiconductor device according to claim 1 , wherein the IGBT region further includes a collector layer of the second conductivity type, the collector layer being located adjacent to the second main surface side relative to the drift layer, the diode region further includes a cathode layer of the first conductivity type, the cathode layer being located adjacent to the second main surface side relative to the drift layer and provided in a formation layer where the collector layer is located, and between the diode region and the IGBT region adjacent to each other, the collector layer extends into the diode region by a protruding distance relative to an interface between the diode region and the IGBT region. 11. The semiconductor device according to claim 1 , wherein the MOS gate structure includes: an IGBT MOS gate structure formed in the IGBT region; and a MOSFET MOS gate structure formed in the MOSFET region, and the MOSFET MOS gate structure is made higher in threshold voltage than the IGBT MOS gate structure. 12. The semiconductor device according to claim 11 , wherein the base layer includes: an IGBT base layer formed in the IGBT region; and a MOSFET base layer formed in the MOSFET region, and the MOSFET base layer is made higher in impurity concentration of the second conductivity type than the IGBT base layer.

Assignees

Inventors

Classifications

  • Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00) · CPC title

  • the built-in components being PN junction diodes · CPC title

  • H10D12/481Primary

    having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs · CPC title

  • PN diodes having the PN junctions in mesas · CPC title

  • having trench gate electrodes, e.g. UMOS transistors · CPC title

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Frequently asked questions

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What does patent US11094691B2 cover?
A semiconductor device includes a semiconductor substrate, and the semiconductor substrate is divided into an IGBT region, a diode region, and a MOSFET region. A drift layer of n−-type is provided in the semiconductor substrate. The drift layer is shared among the IGBT region, the diode region, and the MOSFET region. In the semiconductor substrate, the diode region is always disposed between th…
Who is the assignee on this patent?
Mitsubishi Electric Corp
What technology area does this patent fall under?
Primary CPC classification H10D12/481. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 17 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).