Methods and apparatus for isolation barrier with integrated magnetics for high power modules

Patent metadata

Field	Value
Publication number	US-11094449-B2
Application number	US-201916700739-A
Country	US
Kind code	B2
Filing date	Dec 2, 2019
Priority date	Dec 18, 2015
Publication date	Aug 17, 2021
Grant date	Aug 17, 2021

Abstract

For isolation barrier with magnetics, an apparatus includes an isolation laminate including a dielectric core having a first surface and a second surface opposed to the first surface; at least one conductive layer configured as a first transformer coil overlying the first surface; a first dielectric layer surrounding the at least one conductive layer; a first magnetic layer overlying the at least one conductive layer; at least one additional conductive layer configured as a second transformer coil overlying the second surface; a second dielectric layer surrounding the at least one additional conductive layer; and a second magnetic layer overlying the at least one additional conductive layer. Methods for forming the isolation barriers and additional apparatus arrangements are also described.

First claim

What is claimed is:

1. An apparatus comprising:
an isolation laminate comprising:
a dielectric core having opposite first and second surfaces;
a first conductive layer over the first surface, the first conductive layer including a first transformer coil;
a first dielectric layer on the first conductive layer;
a first magnetic layer over the first conductive layer;
a second conductive layer over the second surface, the second conductive layer including a second transformer coil;
a second dielectric layer on the second conductive layer;
a second magnetic layer over the second conductive layer; and
a third conductive layer over the first surface, the third conductive layer including an electromagnetic interference (EMI) shield.

2. The apparatus of claim 1 , further comprising:
a dielectric material on the EMI shield and between the EMI shield and the first transformer coil.

3. The apparatus of claim 1 , further comprising:
a leadframe having a die attach pad, wherein
the isolation laminate is in thermal contact with the die attach pad through the first magnetic layer or the second magnetic layer.

4. The apparatus of claim 1 , wherein the dielectric core comprises a bismaleimide triazine resin.

5. The apparatus of claim 1 , wherein the first dielectric layer, the second dielectric layer, or both comprises a prepreg material.

6. The apparatus of claim 1 , wherein the first and second magnetic layers are formed from a powdered magnetic material and formed using a sintering operation.

7. The apparatus of claim 6 , wherein the powdered magnetic material comprises a ferrite material.

8. The apparatus of claim 1 , wherein the first magnetic layer, the second magnetic layer, or both comprises a magnetic material having a permeability of greater than about 1.

9. The apparatus of claim 1 , wherein the first magnetic layer, the second magnetic layer, or both comprises a ferrous material.

10. The apparatus of claim 1 , wherein the first magnetic layer, the second magnetic layer, or both comprises one of:
nickel; or
zinc; or
nickel and zinc.

11. The apparatus of claim 1 , wherein the at first, second, and third conductive layers each comprises one of:
copper; or
another electrical conductor.

12. A packaged integrated circuit comprising:
a leadframe having an isolation laminate die attach pad and first and second circuit die attach pads, wherein the isolation laminate die attach pad is isolated from the first circuit die attach pad; and
an isolation laminate coupled to the isolation die attach pad, the isolation laminate comprising:
a dielectric core having opposite first and second surfaces;
a first conductive layer over the first surface, the first conductive layer including a first transformer coil;
a first dielectric layer on the first conductive layer;
a first magnetic layer over the first conductive layer;
a second conductive layer over the second surface, the second conductive layer including a second transformer coil;
a second dielectric layer on the second conductive layer; and
a second magnetic layer over the second conductive layer; and
a third conductive layer over the first surface, the third conductive layer including an electromagnetic interference (EMI) shield.

13. The packaged integrated circuit of claim 12 , further comprising:
a first circuit coupled to the first circuit die attach pad and coupled to the first transformer coil; and
a second circuit coupled to the second circuit die attach pad and coupled to the second transformer coil;
wherein the first circuit and the second circuit are galvanically isolated using the isolation laminate.

14. The packaged integrated circuit of claim 12 , wherein the isolation laminate further comprises:
a dielectric material on the EMI shield and between the EMI shield and the first transformer coil.

15. The packaged integrated circuit of claim 14 , wherein the EMI shield is a first EMI shield, wherein the dielectric material is a first dielectric material, and wherein the isolation laminate further comprises:
a fourth conductive layer over the second surface, the fourth conductive layer including a second EMI shield; and
a second dielectric material on the second EMI shield and between the second EMI shield and the second transformer.

16. The packaged integrated circuit of claim 12 , wherein the first magnetic layer, the second magnetic layer, or both comprises a magnetic material having a permeability of greater than about 1.

17. The packaged integrated circuit of claim 12 , wherein the first magnetic layer, the second magnetic layer, or both comprises one of a ferrite material or a metal-based magnetic material.

18. The packaged integrated circuit of claim 12 , further comprising an encapsulation material around the leadframe and the isolation laminate.

19. A method, comprising:
forming a first conductive layer of a first surface of a dielectric core material having the first surface and an opposite second surface;
forming a first transformer coil in the first conductive layer;
forming a first dielectric layer on the first conductive layer;
forming a first magnetic layer over the first transformer coil;
forming a second conductive layer over the second surface;
forming a second transformer coil in the second surface;
forming a second dielectric layer on the second transformer coil;
forming a second magnetic layer over the second transformer coil; and
forming an electromagnetic interference shield over the first surface.

20. The method of claim 19 , wherein forming the first magnetic layer comprises sintering a magnetic powdered material.

Assignees

• Texas Instruments Inc

Inventors

• Massolini Roberto Giampiero
• Khanolkar Vijaylaxmi
• Mullenix Joyce
• Miftakhutdinov Rais

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/753

  between laterally-adjacent chips · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H01F2027/2819

  Planar transformers with printed windings, e.g. surrounded by two cores and to be mounted on printed circuit · CPC title

• H01F27/288

  Shielding · CPC title