Analog processor comprising quantum devices

Patent metadata

Field	Value
Publication number	US-11093440-B2
Application number	US-202016859672-A
Country	US
Kind code	B2
Filing date	Apr 27, 2020
Priority date	Dec 23, 2004
Publication date	Aug 17, 2021
Grant date	Aug 17, 2021

Abstract

Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.

First claim

We claim:

1. An analog processor, comprising:
a plurality of quantum devices in a periodic arrangement;
a plurality of local bias devices coupled to the plurality of quantum devices;
a plurality of coupling devices, wherein:
a first coupling device of the plurality of coupling devices is selectively operable to tunably couple a first quantum device and a second quantum device of the plurality of quantum devices;
a first set of two or more coupling devices of the plurality of coupling devices crosses a second set of two or more coupling devices of the plurality of coupling devices; and
proximate to where the first set of two or more coupling devices crosses the second set of two or more coupling devices, the first set of two or more coupling devices is electrically isolated from the second set of two or more coupling devices.

2. The analog processor of claim 1 , wherein the periodic arrangement is two-dimensional.

3. The analog processor of claim 1 , wherein each local bias device of the plurality of local bias devices is inductively coupled to a corresponding quantum device of the plurality of quantum devices.

4. The analog processor of claim 1 , wherein each quantum device of the plurality of quantum devices comprises a respective loop of superconducting material interrupted by at least one Josephson junction.

5. The analog processor of claim 4 , wherein the at least one Josephson junction of each quantum device is a compound Josephson junction.

6. The analog processor of claim 5 , wherein each local bias device of the plurality of local bias devices comprises a respective loop inductively coupled to a respective one of the compound Josephson junctions.

7. The analog processor of claim 1 , wherein the plurality of coupling devices comprises a plurality of monostable rf-SQUIDS.

8. The analog processor of claim 1 , wherein the plurality of quantum devices represents nodes in a graph, the plurality of coupling devices represents edges in the graph, and the graph is non-planar.

9. The analog processor of claim 1 , further comprising a plurality of read out devices, a respective read out device of the plurality of read out devices being coupled to a respective one of the quantum devices of the plurality of quantum devices.

10. A computational system, comprising:
a first digital computer; and
an analog processor in communication with the first digital computer, the analog processor comprising:
a plurality of quantum devices in a periodic arrangement,
a plurality of local bias devices communicatively coupled to the plurality of quantum devices, and a plurality of coupling devices, wherein a coupling device of the plurality of coupling devices is selectively operable to tunably couple a first quantum device and a second quantum device of the plurality of quantum devices, and the plurality of quantum devices and the plurality of coupling devices form a non-planar graph;
a quantum device control system to apply a local bias field on one or more quantum device of the plurality of quantum devices, via one or more local bias devices of the plurality of local bias devices; and
a coupling device control system to tune a coupling value for one or more coupling devices of the plurality of coupling devices.

11. The computational system of claim 10 , further comprising a second digital computer in communication with the first digital computer and remote from the first digital computer.

12. The computational system of claim 11 , further comprising non-transitory computer-readable storage media containing processor-executable instructions, which when executed cause at least one processor to:
send a computational problem to be solved from the second digital computer to the first digital computer.

13. The computational system of claim 12 , wherein the processor-executable instructions when executed further cause the at least one processor to:
send an answer to the computational problem from the first digital computer to the second digital computer.

14. The computational system of claim 13 , wherein the processor-executable instructions when executed further cause the at least one processor to:
send the computational problem to be solved from the first digital computer to analog processor; and
receive the answer to the computational problem to be solved from the analog processor.

15. The computational system of claim 10 , further comprising non-transitory computer-readable storage media containing processor-executable instructions, which when executed cause at least one processor to:
initialize the analog processor in an initial state.

16. The computational system of claim 15 , wherein the processor-executable instructions when executed further cause the at least one processor to:
cause the analog processor to evolve away from the initial state towards a final state.

17. The computational system of claim 16 , further comprising a read-out device communicatively coupled to one or more quantum devices of the plurality of quantum devices; and wherein the processor-executable instructions when executed further cause the at least one processor to readout, in conjunction with the read-out device, a plurality of final states from the plurality of quantum devices.

18. The computational system of claim 10 , wherein the processor-executable instructions when executed further cause the at least one processor to map an instance of a computational problem to the analog processor.

19. The computational system of claim 11 , further comprising non-transitory computer-readable storage media containing processor-executable instructions, which when executed cause at least one processor to determine a route of a travelling salesperson, the processor-executable instructions causing the at least one processor to:
send an instance of a travelling salesman problem to be solved from the second digital computer to the first digital computer;
send the instance of the travelling salesman problem to be solved from the first digital computer to analog processor;
receive and answer to the instance of the travelling salesman problem to be solved from the analog processor; and
send the answer to the instance of the travelling salesman problem from the first digital computer to the second digital computer.

20. The computational system of claim 19 , wherein the processor-executable instructions when executed further cause the at least one processor to:
direct the movement of the travelling salesperson per the answer to the instance of the travelling salesman problem.

21. The computational system of claim 19 , wherein the second digital computer is carried by the travelling salesperson.

Assignees

• D Wave Systems Inc

Inventors

• Maassen Van Den Brink Alexander
• Love Peter
• Amin Mohammad H S
• Rose Geordie
• Grant David
• Steininger Miles F H
• Bunyk Paul I
• Berkley Andrew J

Classifications

• G06N10/40

  Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control · CPC title

• G06N5/01 Primary

  Dynamic search techniques; Heuristics; Dynamic trees; Branch-and-bound · CPC title

• G06G7/12

  Arrangements for performing computing operations, e.g. {operational} amplifiers specially adapted therefor · CPC title

• G06J3/00 Primary

  Systems for conjoint operation of complete digital and complete analogue computers · CPC title

• H04L67/12

  specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks · CPC title