Detection circuit and electronic device

Patent metadata

Field	Value
Publication number	US-11093081-B2
Application number	US-201916693200-A
Country	US
Kind code	B2
Filing date	Nov 22, 2019
Priority date	Aug 13, 2018
Publication date	Aug 17, 2021
Grant date	Aug 17, 2021

Abstract

The present disclosure provides a detection circuit and an electronic device. The detection circuit includes a driving circuit, a cancelling circuit, and a switching circuit. Each driving module of the driving circuit is coupled to a detection capacitor for charging it; each cancelling module of the cancelling circuit is coupled to the detection capacitor to perform capacitance cancellation through two directions; each cancelling module of the cancelling circuit is coupled to the switching module to perform conversion of a capacitive signal and then output. The present disclosure can improve a detection accuracy of the capacitor.

First claim

What is claimed is:

1. A detection circuit, comprising: a driving circuit, a cancelling circuit, and a switching circuit;
the driving circuit comprises at least one driving module; each driving module is coupled to at least one detection capacitor and is configured to periodically charge the one detection capacitor;
the cancelling circuit comprises at least one cancelling module; each cancelling module is coupled to the one detection capacitor and is configured to cancel an initial capacitance of the one detection capacitor by charge transfer in two directions; and
the switching circuit comprises at least one switching module; the each cancelling module is further coupled to one switching module which is configured to, after the initial capacitance of the one detection capacitor is cancelled, convert a capacitive signal of the one detection capacitor to a voltage signal and output;
wherein the each cancelling module comprises: a cancelling voltage source, a first cancelling capacitor, a third switch, a fourth switch, a fifth switch, a sixth switch, and a seventh switch;
one terminal of the first cancelling capacitor is coupled to the one detection capacitor through the third switch; the one terminal of the first cancelling capacitor is also coupled to the cancelling voltage source through the fourth switch, and is also coupled to the ground through the fifth switch; and
the other terminal of the first cancelling capacitor is also coupled to the ground through the sixth switch, and is also coupled to the cancelling voltage source through the seventh switch.

2. The circuit according to claim 1 , wherein the each driving module comprises: a driving voltage source, a first switch, and a second switch;
the driving voltage source is coupled to one terminal of the one detection capacitor through the first switch; the other terminal of the one detection capacitor is coupled to a ground; and
the one terminal of the one detection capacitor is also coupled to the ground through the second switch.

3. The circuit according to claim 1 , wherein the first cancelling capacitor is a tunable capacitor or a fixed capacitor.

4. The circuit according to claim 1 , wherein the driving voltage source and the cancelling voltage source are a same voltage source.

5. The circuit according to claim 2 , wherein the each switching module comprises: an eighth switch, a ninth switch, a first feedback capacitor, and an operational amplifier;
the each cancelling module is coupled to an inverting input terminal of the operational amplifier through the eighth switch;
the first feedback capacitor is coupled between the inverting input terminal of the operational amplifier and an output terminal of the operational amplifier; the ninth switch is also coupled between the inverting input terminal of the operational amplifier and the output terminal of the operational amplifier; and
a non-inverting input terminal of the operational amplifier is coupled with a common mode voltage source.

6. The circuit according to claim 5 , wherein an output voltage of the common mode voltage source is ½ of the driving voltage source.

7. The circuit according to claim 1 , wherein the circuit further comprises:
a filter, an analog to digital converter (ADC) and a digital signal processor (DSP);
an output terminal of the switching circuit is coupled to the filter; the filter is coupled to the ADC, and the ADC is further coupled to the DSP;
the filter is configured to perform band pass filtering on at least one path of voltage signal output by the at least one switching module;
the ADC is configured to convert at least one path of filtered signal into a digital signal; and
the DSP is configured to perform in-phase quadrature (IQ) demodulation on the digital signal and then output.

8. The circuit according to claim 2 , wherein the circuit further comprises:
a filter, an analog to digital converter (ADC) and a digital signal processor (DSP);
an output terminal of the switching circuit is coupled to the filter; the filter is coupled to the ADC, and the ADC is further coupled to the DSP;
the filter is configured to perform band pass filtering on at least one path of voltage signal output by the at least one switching module;
the ADC is configured to convert at least one path of filtered signal into a digital signal; and
the DSP is configured to perform in-phase quadrature (IQ) demodulation on the digital signal and then output.

9. The circuit according to claim 1 , wherein the circuit further comprises:
a filter, an analog to digital converter (ADC) and a digital signal processor (DSP);
an output terminal of the switching circuit is coupled to the filter; the filter is coupled to the ADC, and the ADC is further coupled to the DSP;
the filter is configured to perform band pass filtering on at least one path of voltage signal output by the at least one switching module;
the ADC is configured to convert at least one path of filtered signal into a digital signal; and
the DSP is configured to perform in-phase quadrature (IQ) demodulation on the digital signal and then output.

10. The circuit according to claim 7 , wherein if a number of the detection capacitor is multiple, then the ADC is further configured to perform differential processing on multiple paths of filtered signals, and convert them into digital signals.

11. An electronic device, comprising: a detection circuit; the detection circuit comprises: a driving circuit, a cancelling circuit, and a switching circuit;
the driving circuit comprises at least one driving module; each driving module is coupled to at least one detection capacitor and is configured to periodically charge the one detection capacitor;
the cancelling circuit comprises at least one cancelling module; each cancelling module is coupled to the one detection capacitor and is configured to cancel an initial capacitance of the one detection capacitor by charge transfer in two directions; and
the switching circuit comprises at least one switching module; the each cancelling module is further coupled to one switching module which is configured to, after the initial capacitance of the one detection capacitor is cancelled, convert a capacitive signal of the one detection capacitor to a voltage signal and output;
wherein the each cancelling module comprises: a cancelling voltage source, a first cancelling capacitor, a third switch, a fourth switch, a fifth switch, a sixth switch, and a seventh switch;
one terminal of the first cancelling capacitor is coupled to the one detection capacitor through the third switch; the one terminal of the first cancelling capacitor is also coupled to the cancelling voltage source through the fourth switch, and is also coupled to the ground through the fifth switch; and
the other terminal of the first cancelling capacitor is also coupled to the ground through the sixth switch, and is also coupled to the cancelling voltage source through the seventh switch.

12. The device according to claim 11 , wherein the each driving module comprises: a driving voltage source, a first switch, and a second switch;
the driving voltage source is coupled to one terminal of the one detection capacitor through the first switch; the other terminal of the one detection capacitor is coupled to a ground; and
the one terminal of the one detection capacitor is also coupled to the ground through the second switch.

13. The device according to claim 11 , wherein the first cancelling capacitor is a tunable capacitor or a fixed capacitor.

14. The device according to claim 11 , wherein the driving voltage source and the cancelling voltage source a

Assignees

• Shenzhen Goodix Tech Co Ltd

Inventors

• Feng Lin
• Zhang Guanjun

Classifications

• G06F3/04182 Primary

  Filtering of noise external to the device and not generated by digitiser components · CPC title

• G06F3/0443

  using a single layer of sensing electrodes · CPC title

• G06F3/0416 Primary

  Control or interface arrangements specially adapted for digitisers · CPC title