Tamper sensor

Patent metadata

Field	Value
Publication number	US-11089675-B2
Application number	US-201816166560-A
Country	US
Kind code	B2
Filing date	Oct 22, 2018
Priority date	Oct 22, 2018
Publication date	Aug 10, 2021
Grant date	Aug 10, 2021

Abstract

A tamper sensor that includes a substrate and a conductive layer placed on the substrate. The tamper sensor also includes an insulation layer that is stacked on the conductive layer to form a layered tamper circuit. In addition, the substrate of the tamper sensor is the only substrate of the tamper sensor.

First claim

What is claimed is:

1. A tamper sensor comprising:
a substrate formed from a flexible polyvinylidene fluoride or polyvinylidene difluoride film;
a first conductive layer placed on a surface of the substrate;
an insulation layer stacked on the first conductive layer;
a second conductive layer placed on top of the insulation layer to form a layered tamper circuit;
wherein the insulation layer on the first conductive layer includes one or more windows formed therein to provide one or more vias through the one or more windows to electrically connect the first conductive layer and second conductive layer, and wherein the one or more windows are positioned in a manner determined to enhance security of the tamper sensor; and
wherein the substrate is the only substrate of the tamper sensor, and wherein the first conductive layer is in continuous contact with the surface of the substrate.

2. The tamper sensor of claim 1 , wherein the layered tamper circuit is a mesh layered tamper circuit formed by printing the first conductive layer on the substrate, printing the insulation layer on the conductive layer, and printing the second conductive layer on the insulation layer.

3. The tamper sensor of claim 1 , wherein the conductive layer includes one of a serpentine trace, a rectilinear trace, or a straight trace.

4. The tamper sensor assembly of claim 1 , wherein the conductive layer is a flood plane, and the insulation layer is a flood plane.

5. The tamper sensor of claim 1 , further comprising: a via electrically connecting the first conductive layer to the second conductive layer.

6. The tamper sensor of claim 5 , wherein the first conductive layer is a serpentine trace, the second conductive layer is a serpentine trace, and the via is a blind via or a buried via.

7. The tamper sensor of claim 1 , further comprising: a second insulation layer stacked on the second conductive layer; and a third conductive layer stacked on the second insulation layer.

8. The tamper sensor of claim 1 , wherein the first conductive layer is placed on a first side of the substrate and further comprising: a third conductive layer placed on a second side of the substrate that is opposite the first side; a second insulation layer stacked on the third conductive layer; and a fourth conductive layer placed on the second insulation layer.

9. The tamper sensor of claim 1 , wherein the first conductive layer has a thickness that is different than a thickness of the insulation layer.

10. A tamper sensor assembly comprising:
a tamper sensor comprising:
a first conductive layer placed on a first surface of a substrate, the first conductive layer having a continuous interface surface that extends along an entirety of the first conductive layer and that is in direct contact with the substrate, wherein the substrate is formed from a flexible polyvinylidene fluoride or polyvinylidene difluoride film;
an insulation layer stacked on the first conductive layer; and
a second conductive layer stacked on the insulation layer;
a hardware circuitry electrically coupled to the substrate; and
wherein the insulation layer includes one or more windows formed therein to provide one or more vias through the one or more windows to electrically connect the first conductive layer and second conductive layer, and wherein the one or more windows are positioned in a manner determined to enhance security of the tamper sensor;
wherein the first conductive layer, second conductive layer, and insulation layer are configured to cause one of a closed circuit or open circuit at one or more of the first conductive layer and second conductive layer when the tamper sensor is altered; and
wherein responsive to alteration of the tamper sensor, the tamper sensor modifies operation of the hardware circuitry.

11. The tamper sensor assembly of claim 10 , wherein the first conductive layer, second conductive layer, and insulation layer are printed on the substrate to form a mesh circuit.

12. The tamper sensor assembly of claim 11 , wherein the first conductive layer includes one of a serpentine trace, a rectilinear trace, or a straight trace, and the second conductive layer includes one of a serpentine trace, rectilinear trace, or straight trace.

13. The tamper sensor assembly of claim 12 , wherein a via is disposed through a window in the insulation layer to electrically connect the first conductive layer to the second conductive layer.

14. The tamper sensor assembly of claim 12 , wherein the first conductive layer is crimped to the second conductive layer to electrically connect the first conductive layer to the second conductive layer.

15. The tamper sensor assembly of claim 10 , wherein the first conductive layer is placed on a first side of the substrate and wherein the tamper sensor further comprises a third conductive layer that is placed on a second side of the substrate that is opposite the first side.

16. The tamper sensor assembly of claim 10 , wherein the substrate is the only substrate of the tamper sensor assembly.

17. A tamper sensor comprising:
a substrate formed from polyvinylidene fluoride or polyvinylidene difluoride (PVDF) film;
a first serpentine trace printed on and in continuous contact with the PVDF film;
an insulation layer printed on the PVDF film;
a second serpentine trace printed on the insulation layer; and
a via secured between the first serpentine trace and second serpentine trace, wherein the via is disposed through a window in the insulation layer, wherein the window is positioned in a manner determined to enhance the security of the tamper sensor;
wherein the first serpentine trace, second serpentine trace, insulation layer, and via collectively form a mesh circuit.

18. The tamper sensor of claim 17 , wherein the substrate is the only substrate of the tamper sensor.

19. The tamper sensor of claim 17 , wherein the mesh circuit includes an adhesive material.

Assignees

• Te Connectivity Corp

Inventors

• Jermstad Kenneth
• Ritchie Michael
• Updyke Marcus
• Ball Anthony

Classifications

• H05K1/0275 Primary

  Security details, e.g. tampering prevention or detection · CPC title

• H05K2201/10151

  Sensor · CPC title

• G08B13/128

  the housing being an electronic circuit unit, e.g. memory or CPU chip (protecting computer components in secure or tamper resistant housings G06F21/86; protecting computer input devices, e.g. keyboards G06F21/83) · CPC title

• G06F21/87

  by means of encapsulation, e.g. for integrated circuits · CPC title

• G06F21/86 Primary

  Secure or tamper-resistant housings · CPC title