Power amplifier
US-2015015338-A1 · Jan 15, 2015 · US
US11088664B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11088664-B2 |
| Application number | US-201916714128-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 13, 2019 |
| Priority date | Dec 13, 2018 |
| Publication date | Aug 10, 2021 |
| Grant date | Aug 10, 2021 |
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A signal generator is configured to generate a signal with an amplitude sweep, the signal generator having circuitry comprising: a set of control components, each control component of the set being arranged to be switchably activated in parallel in the circuitry such that an amplitude of the signal has an intrinsic dependence on the number of the control components activated; a shift register controllable by a clock line and comprising a number of bits, each bit of the number of bits controlling activation of a respective control component of the set of control components such that the control components are arranged to be activated or de-activated in a pre-determined order by shifting activation or de-activation bits into the shift register, wherein the shifting is paced by the clock line; and a clock signal generator configured to output a clock signal with a time modulation on the clock line.
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What is claimed is: 1. A signal generator configured to generate a signal with an amplitude sweep, the signal generator having circuitry comprising: a set of control components, wherein each control component of the set of control components is configured to be switchably activated in parallel in the circuitry such that an amplitude of the signal depends on a particular number of the control components that are activated; a shift register controllable by a clock line and comprising a serialized configuration of registers that represent a corresponding plurality of bits, each bit of the plurality of bits is configured to control activation of a respective control component of the set of control components to facilitate activation or de-activation of the control component in a pre-determined order by shifting, respectively, activation or de-activation bits into the shift register, wherein the shifting is paced by the clock line; and a clock signal generator configured to output a clock signal with a time modulation on the clock line. 2. The signal generator of claim 1 , wherein the signal generator is an RF transmitter and each control component of the set of control components is a power amplifier unit. 3. The signal generator of claim 1 , the signal generator further comprising an output stage configured to output the signal, wherein the output stage is controlled by a bias current generated by a bias current source controlled by the set of control components. 4. The signal generator of claim 3 , wherein the signal generator is an RF transmitter and the output stage is a power amplifier unit. 5. The signal generator of claim 4 , wherein each control component of the set of control components is a current source configured to contribute current to the bias current source. 6. The signal generator of claim 5 , wherein the bias current source is a current mirror. 7. The signal generator of claim 6 , wherein each control component of the set of control components comprises a resistor in series with a transistor controlled by a bit of the shift register. 8. The signal generator of claim 7 , wherein the signal generator is configured to generate the amplitude sweep with a specific time dependence, wherein the time modulation is based on the specific time dependence of the amplitude sweep in relation to the dependence of the amplitude of the signal on the particular number of the control components that are activated, such that the signal generator generates the amplitude sweep with the specific time dependence. 9. The signal generator of claim 8 , wherein the specific time dependence of the amplitude sweep is a linear ramp. 10. The signal generator of claim 9 , wherein the amplitude sweep is towards increasing amplitude. 11. A method of generating a signal with an amplitude sweep, the method comprising: shifting activation or de-activation bits into a shift register that comprises a serialized configuration of registers that represent a corresponding plurality of bits, each bit of the plurality of bits is configured to control activation of a respective control component of a set of control components in parallel in circuitry of a signal generator, wherein the control components are activated or de-activated in a pre-determined order by the serial shifting of the activation or deactivation bits through the registers, the amplitude of the signal depends on a particular number of control components that are activated, wherein the shifting is paced by a clock signal having a time modulation. 12. The method of claim 11 , wherein the signal generator is an RF transmitter and each control component of the set of control components is a power amplifier unit. 13. The method of claim 11 , the signal generator comprising an output stage, the method further comprising: outputting, by the signal generator, the signal; and controlling the output stage by a bias current generated by a bias current source controlled by the set of control components. 14. The method of claim 13 , wherein the signal generator is an RF transmitter and the output stage is a power amplifier unit. 15. The method of claim 14 , wherein each control component of the set of control components is a current source, the method further comprising: generating, by each of the control components, a current that contributes the bias current source. 16. The method of claim 15 , wherein the bias current source is a current mirror. 17. The method of claim 16 , wherein each control component of the set of control components comprises a resistor in series with a transistor controlled by a bit of the shift register. 18. The method of claim 17 , further comprising: generating, by the signal generator, the amplitude sweep with a specific time dependence, wherein the time modulation is based on the specific time dependence of the amplitude sweep in relation to the dependence of the amplitude of the signal on the number of control components activated, such that the signal generator generates the amplitude sweep with the specific time dependence. 19. The method of claim 18 , wherein the specific time dependence of the amplitude sweep is a linear ramp. 20. The method of claim 19 , wherein the amplitude sweep is towards increasing amplitude.
Output signals are combined by switching a plurality of paralleled power amplifiers to a common output · CPC title
using digital techniques · CPC title
using finite field arithmetic, e.g. using a linear feedback shift register · CPC title
with semiconductor devices only · CPC title
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