Conductive wire structure and manufacturing method thereof, array substrate and display device

US11088180B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11088180-B2
Application numberUS-201916512664-A
CountryUS
Kind codeB2
Filing dateJul 16, 2019
Priority dateNov 14, 2018
Publication dateAug 10, 2021
Grant dateAug 10, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure provides a conductive wire structure, a manufacturing method thereof, an array substrate and a display device. The conductive wire structure includes a first conductive wire and a second conductive wire on a first plane, wherein a connection end of the first conductive wire is spaced apart from a connection end of the second conductive wire by a gap so as to discharge charges accumulated on the first conductive wire and the second conductive wire through the gap; an electrical connector connected to the connection end of the first conductive wire and the connection end of the second conductive wire, respectively, wherein a part of the electrical connector is located on a second plane different from the first plane.

First claim

Opening claim text (preview).

What is claimed is: 1. An array substrate, comprising: a first conductive wire, a second conductive wire, a third conductive wire, a first gate, a second gate and a third gate on a first plane, wherein a first connection end of the first conductive wire is electrically connected with the first gate, a first connection end of the second conductive wire is electrically connected with the second gate, the third conductive wire is electrically connected with the third gate, the third conductive wire is not electrically connected with the first conductive wire and the second conductive wire, a second connection end of the first conductive wire is spaced apart from a second connection end of the second conductive wire by a gap, the first conductive wire and the second conductive wire to discharge accumulated charges through the gap, a width of the gap is smaller than a distance between the third conductive wire and the first gate or a distance between the third conductive wire and the second gate; and an electrical connector connected to the second connection end of the first conductive wire and the second connection end of the second conductive wire, respectively, wherein a part of the electrical connector is located on a second plane different from the first plane. 2. The array substrate according to claim 1 , wherein a projection of an end face of the first conductive wire on a plane where an end face of the second conductive wire is located at least partially covers the end face of the second conductive wire. 3. The array substrate according to claim 1 , wherein a width of the gap is 5 to 10 μm. 4. The array substrate according to claim 1 , wherein line widths of the first conductive wire and the second conductive wire are 5 to 10 μm. 5. The array substrate according to claim 1 , wherein the electrical connector comprises: a first connection portion, electrically connected with the second connection end of the first conductive wire; a second connection portion, electrically connected with the second connection end of the second conductive wire; and a third connection portion, electrically connected to the first connection portion and the second connection portion, respectively. 6. The array substrate according to claim 5 , wherein the third connection portion is located on the second plane. 7. The array substrate according to claim 1 , wherein the gap is located in a display area. 8. A display device comprising the array substrate according to claim 1 . 9. A manufacturing method of a conductive wire structure, comprising: forming a first conductive wire, a second conductive wire, a third conductive wire, a first gate, a second gate and a third gate on a first plane, wherein a first connection end of the first conductive wire is electrically connected with the first gate, a first connection end of the second conductive wire is electrically connected with the second gate, the third conductive wire is electrically connected with the third gate, the third conductive wire is not electrically connected with the first conductive wire and the second conductive wire, a second connection end of the first conductive wire is spaced apart from a second connection end of the second conductive wire by a gap, the first conductive wire and the second conductive wire to discharge accumulated charges through the gap, a width of the gap is smaller than a distance between the third conductive wire and the first gate or a distance between the third conductive wire and the second gate; and forming an electrical connector connected to the second connection end of the first conductive wire and the second connection end of the second conductive wire, respectively, wherein a part of the electrical connector is located on a second plane different from the first plane. 10. The manufacturing method according to claim 9 , wherein a projection of an end face of the first conductive wire on a plane where an end face of the second conductive wire is located at least partially covers the end face of the second conductive wire. 11. The manufacturing method according to claim 10 , wherein a width of the gap is 5 to 10 μm. 12. The manufacturing method according to claim 10 , wherein line widths of the first conductive wire and the second conductive wire are 5 to 10 μm.

Assignees

Inventors

Classifications

  • characterised by the dispositions of the protective arrangements · CPC title

  • for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs · CPC title

  • Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] · CPC title

  • of multiple TFTs · CPC title

  • of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation · CPC title

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What does patent US11088180B2 cover?
The present disclosure provides a conductive wire structure, a manufacturing method thereof, an array substrate and a display device. The conductive wire structure includes a first conductive wire and a second conductive wire on a first plane, wherein a connection end of the first conductive wire is spaced apart from a connection end of the second conductive wire by a gap so as to discharge cha…
Who is the assignee on this patent?
Hefei Boe Optoelectronics Tech, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D86/60. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 10 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).