Load drive circuit, light emitting diode driver, and display device
US-2024397595-A1 · Nov 28, 2024 · US
US11087706B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11087706-B2 |
| Application number | US-201916441758-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 14, 2019 |
| Priority date | Jul 13, 2018 |
| Publication date | Aug 10, 2021 |
| Grant date | Aug 10, 2021 |
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The present disclosure provides a display driving circuit and a driving method thereof, a display panel, and a display device. The display driving circuit comprises: a gate auxiliary circuit configured to selectively output one of a data signal from a source driver and a common voltage signal in response to a first control signal; and a gate auxiliary circuit configured to selectively output one of a scan signal from a gate driver and an active level signal in response to a second control signal, the active level signal being a signal enabling a corresponding switch transistor to be turned on.
Opening claim text (preview).
What is claimed is: 1. A display driving circuit, the display driving circuit comprising: a source driver configured to output a data signal; a source auxiliary circuit, coupled between the source driver and a data line of a display panel, and configured to, in response to a first control signal being in a first level state, output the data signal from the source driver to the data line in a display period for displaying an image, and in response to the first control signal being in a second level state, output a common voltage signal to the data line in a supplemental period, wherein the supplemental period is after the display period, a period for displaying one frame of image comprises the display period and the supplemental period, and the display panel comprises a common electrode supplied with the common voltage signal; a gate driver configured to output a scan signal; and a gate auxiliary circuit, coupled between the gate driver and a gate line of the display panel, and configured to, in response to a second control signal being in a third level state, output the scan signal from the gate driver, to the gate line in the display period, and in response to the second control signal being in a fourth level state, output an active level signal to the gate line in the supplemental period, the active level signal being a signal enabling a corresponding switch transistor to be turned on; wherein the gate auxiliary circuit comprises a third switch transistor, a control electrode of the third switch transistor being directly coupled to a second control signal terminal that provides the second control signal, a first electrode of the third switch transistor being directly coupled to an active level signal terminal that provides the active level signal, and a second electrode of the third switch transistor being directly coupled to the gate driver. 2. The display driving circuit of claim 1 , wherein the source auxiliary circuit comprises an inverter, a first switch transistor and a second switch transistor, the first switch transistor and the second switch transistor having a same conductivity type; an input terminal of the inverter is coupled to a first control signal terminal that provides the first control signal; a control electrode of the first switch transistor is coupled to an output terminal of the inverter, a first electrode of the first switch transistor is coupled to the source driver, and a second electrode of the first switch transistor is coupled to an output terminal of the source auxiliary circuit; and a control electrode of the second switch transistor is coupled to the first control signal terminal, a first electrode of the second switch transistor is coupled to the output terminal of the source auxiliary circuit, and a second electrode of the second switch transistor is coupled to a common voltage signal terminal that provides the common voltage signal. 3. The display driving circuit of claim 2 , wherein the inverter comprises a first resistor, a second resistor, a third resistor, an operational amplifier, and a first capacitor; a first terminal of the first resistor is coupled to the first control signal terminal, and a second terminal of the first resistor is coupled to an inverting input terminal of the operational amplifier; a first terminal of the second resistor is coupled to a first terminal of the first capacitor and the inverting input terminal of the operational amplifier, and a second terminal of the second resistor is coupled to a second terminal of the first capacitor and an output terminal of the operational amplifier; a first terminal of the third resistor is coupled to a non-inverting input terminal of the operational amplifier, and a second terminal of the third resistor is grounded; and the output terminal of the operational amplifier is coupled to the control electrode of the first switch transistor. 4. The display driving circuit of claim 1 , wherein the source auxiliary circuit comprises a first switch transistor and a second switch transistor, the first switch transistor and the second switch transistor having different conductivity types; a control electrode of the first switch transistor is coupled to a first control signal terminal that provides the first control signal, a first electrode of the first switch transistor is coupled to the source driver, and a second electrode of the first switch transistor is coupled to an output terminal of the source auxiliary circuit; and a control electrode of the second switch transistor is coupled to the first control signal terminal, a first electrode of the second switch transistor is coupled to the output terminal of the source auxiliary circuit, and a second electrode of the second switch transistor is coupled to a common voltage signal terminal that provides the common voltage signal. 5. The display driving circuit of claim 1 , wherein the gate auxiliary circuit comprises a third switch transistor, a control electrode and a first electrode of the third switch transistor being coupled to a second control signal terminal that provides the second control signal, and a second electrode of the third switch transistor being coupled to the gate driver. 6. The display driving circuit of claim 1 , wherein the source auxiliary circuit and the gate auxiliary circuit have a same circuit structure. 7. The display driving circuit of claim 1 , wherein the first control signal and the second control signal are a same signal. 8. The display driving circuit of claim 1 , wherein the gate driver comprises N cascaded shift register units, each of which comprises one scan signal terminal, where N is an integer greater than 2, and the gate driver outputs the scan signal through the scan signal terminal. 9. The display driving circuit of claim 1 , wherein the source auxiliary circuit comprises a first resistor, a second resistor, a third resistor, a first switch transistor, a second switch transistor, an operational amplifier and a first capacitor, the first switch transistor and the second switch transistor have a same conductivity type, and the gate auxiliary circuit comprises a third switch transistor; a first terminal of the first resistor is coupled to a first control signal terminal that provides the first control signal, and a second terminal of the first resistor is coupled to an inverting input terminal of the operational amplifier; a first terminal of the second resistor is coupled to a first terminal of the first capacitor and the inverting input terminal of the operational amplifier, and a second terminal of the second resistor is coupled to a second terminal of the first capacitor and an output terminal of the operational amplifier; a first terminal of the third resistor is coupled to a non-inverting input terminal of the operational amplifier, and a second terminal of the third resistor is grounded; a control electrode of the first switch transistor is coupled to the output terminal of the operational amplifier, a first electrode of the first switch transistor is coupled to the source driver, and a second electrode of the first switch transistor is coupled to an output terminal of the source auxiliary circuit; a control electrode of the second switch transistor is coupled to the first control signal terminal, a first electrode of the second switch transistor is coupled to the output terminal of the source auxiliary circuit, a second electrode of the second switch transistor is coupled to a common voltage signal terminal that provides the common voltage signal; and a control electrode of the third switch transistor is coupled to a second control signal terminal that provides the second control signal, a first electrode of the third switc
Precharge or discharge of column electrodes before or after applying exact column voltages · CPC title
Details of the generation of driving signals · CPC title
Reduction of after-image effects · CPC title
Details of a shift registers arranged for use in a driving circuit · CPC title
suitable for active matrices only · CPC title
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