Driving circuitry and method of display panel and display device

Patent metadata

Field	Value
Publication number	US-11087705-B2
Application number	US-201715776086-A
Country	US
Kind code	B2
Filing date	Aug 29, 2017
Priority date	Jan 4, 2017
Publication date	Aug 10, 2021
Grant date	Aug 10, 2021

Abstract

A driving method of a display panel, a driving circuitry of a display panel and a display device are provided. The display panel includes Y gate lines, the Y gate lines are divided into a plurality of gate line groups based on a scanning sequence of the Y gate lines, and each gate line group includes at least one gate line; the driving method includes: determining an i th gate line to be scanned; adjusting an original charging duration of a scanning signal corresponding to the i th gate line to an adjustment charging duration, where the adjustment charging duration of every gate line in each gate line group are identical, and the adjustment charging durations of respective gate line groups gradually increase in a direction away from a source driver; and outputting the scanning signal corresponding to the i th gate line to the i th gate line, based on the adjustment charging duration of the i th gate line.

First claim

What is claimed is:

1. A driving method of a display panel, wherein the display panel comprises Y gate lines, the Y gate lines are divided into a plurality of gate line groups based on a scanning sequence of the Y gate lines, and each gate line group comprises at least one gate line;
the driving method comprises:
determining an i th gate line to be scanned, wherein 1≤i≤Y;
pre-storing an adjustment charging duration of each gate line;
adjusting an original charging duration of a scanning signal corresponding to the i th gate line to the adjustment charging duration, wherein the adjustment charging duration of every gate line in each gate line group are identical, and the adjustment charging duration of respective gate line groups gradually increases in a direction away from a source driver; and
outputting the scanning signal corresponding to the i th gate line to the i th gate line, based on the adjustment charging duration of the i th gate line,
wherein the pre-storing an adjustment charging duration of each gate line, further comprises:
determining a width of horizontal blank (H-Blank) data of video data corresponding to a i th row of gate lines to be adjusted, to obtain a resultant width of the H-Blank data corresponding to the i th row of gate lines;
determining the adjustment charging duration of the i th row of gate lines based on the resultant width of the H-Blank data corresponding to the i th row of gate lines,
wherein the determining the width of the H-Blank data of the video data corresponding to the i th row of gate lines to be adjusted, to obtain the resultant width of the H-Blank data corresponding to the i th row of gate lines, further comprises:
determining a width k0 of the H-Blank data of the video data corresponding to a first row of gate lines to be reduced;
calculating a resultant width n(1) of the H-Blank data corresponding to the first row of gate lines, wherein n(1)=HB−k0;
calculating a difference Δk between the resultant width of the H-Blank data corresponding to the i th row of gate lines and n(1), wherein

Δ
⁢
k

=

2
⁢
m
⁢
k
⁢
0

Y

*

int
⁡

(

i
m

)

,

Y is a total number of the gate lines of the display panel, and m is a total number of the gate line groups; and
calculating a resultant width n(i) of the H-Blank data corresponding to the i th row of gate lines, wherein n(i)=HB−k0+Δk, HB is a width of the H-Blank data of the video data corresponding to the i th row of gate lines.

2. The driving method according to claim 1 , wherein a sum of the adjustment charging duration of the Y gate lines is identical to a sum of the original charging duration of the Y gate lines.

3. The driving method according to claim 1 , wherein the determining the width k0 of the H-Blank data of the video data corresponding to the first row of gate lines to be reduced, further comprises:
calculating a width k of the H-Blank data of the video data corresponding to the first row of gate lines to be reduced at best, wherein

(

N
⁢
L

-
1

)

*
X

=

1
2

*
k
*

Y
2

,

NL is a volume of data that one line buffer of a time sequence controller capable of storing, X is a volume of valid data of one line of video data, Y is the total number of the gate lines of the display panel, k<HB, and HB is the width of the H-Blank data of the video data corresponding to the i th row of gate lines;
selecting a value smaller than or equal to k as the width k0 of the H-Blank data of the video data corresponding to the first row of gate lines to be reduced.

4. A driving method of a display panel, wherein the display panel comprises Y gate lines, the Y gate lines are divided into a plurality of gate line groups based on a scanning sequence of the Y gate lines, and each gate line group comprises at least one gate line;
the driving method comprises:
determining an i th gate line to be scanned, wherein 1≤i≤Y;
pre-storing an adjustment charging duration of each gate line;
adjusting an original charging duration of a scanning signal corresponding to the i th gate line to the adjustment charging duration, wherein the adjustment charging duration of every gate line in each gate line group are identical, and the adjustment charging duration of respective gate line groups gradually increases in a direction away from a source driver; and
outputting the scanning signal corresponding to the i th gate line to the i th gate line, based on the adjustment charging duration of the i th gate line,
wherein the pre-storing an adjustment charging duration of each gate line, further comprises:
determining a width of horizontal blank (H-Blank) data of video data corresponding to a i th row of gate lines to be adjusted, to obtain a resultant width of the H-Blank data corresponding to the i th row of gate lines;
determining the adjustment charging duration of the i th row of gate lines based on the resultant width of the H-Blank data corresponding to the i th row of gate lines,
wherein the determining the width of the H-Blank data of the video data corresponding to the i th row of gate lines to be adjusted, to obtain the resultant width of the H-Blank data corresponding to the i th row of gate lines, further comprises:
determining a width k0 of the H-Blank data of the video data corresponding to a first row of gate lines to be reduced;
calculating a resultant width n(1) of the H-Blank data corresponding to the first row of gate lines, wherein n(1)=HB−k0;
calculating a difference Δk between the resultant width of the H-Blank data corresponding to the i th row of gate lines and n(1), wherein

Δ
⁢

⁢
k

=

int
⁡

(

k
⁢

⁢
0
*

Assignees

• Boe Technology Group Co Ltd
• Beijing Boe Display Tech Co

Inventors

• Zhou Liugang
• Wang Jianming
• Li Shou
• Li Tao
• Shi Yuan

Classifications

• G09G3/3677 Primary

  suitable for active matrices only · CPC title

• G09G2310/0251

  Precharge or discharge of pixel before applying new pixel voltage · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G3/3648 Primary

  using an active matrix (G09G3/367 - G09G3/3696 take precedence) · CPC title

• G09G2320/02

  Improving the quality of display appearance · CPC title