Integrated touch and display architectures for self-capacitive touch sensors

US11086444B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11086444-B2
Application numberUS-201816192664-A
CountryUS
Kind codeB2
Filing dateNov 15, 2018
Priority dateDec 13, 2013
Publication dateAug 10, 2021
Grant dateAug 10, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A self-capacitive touch sensor panel configured to have a portion of both the touch and display functionality integrated into a common layer is provided. The touch sensor panel includes a layer with circuit elements that can switchably operate as both touch circuitry and display circuitry such that during a touch mode of the device the circuit elements operate as touch circuitry and during a display mode of the device the circuit elements operate as display circuitry. The touch mode and display mode can be time multiplexed. By integrating the touch hardware and display hardware into common layers, savings in power, weight and thickness of the device can be realized.

First claim

Opening claim text (preview).

What is claimed is: 1. An organic light emitting diode touch sensitive display including a plurality of display pixels, the display comprising: an electrode layer including a plurality of self-capacitance touch sensor electrodes, wherein each of the plurality of self-capacitance touch sensor electrodes is electrically isolated from others of the plurality of self-capacitance touch sensor electrodes; a cathode layer that is coupled to AC ground during a touch detection mode of the display and is configured to reduce a parasitic capacitance effect on the plurality of self-capacitance touch sensor electrodes, wherein the parasitic capacitance effect includes an effect from capacitive coupling between the plurality of self-capacitance touch sensor electrodes and the cathode layer, and reducing the parasitic capacitance effect includes reducing the capacitive coupling between the plurality of self-capacitance touch sensor electrodes and the cathode layer; an anode layer; an organic layer, the organic layer including a plurality of organic light emitting diodes; and an encapsulation layer disposed between the cathode layer and the electrode layer. 2. The display of claim 1 , wherein the touch detection mode of the display and a display mode of the display are time multiplexed. 3. The display of claim 1 , further comprising: a metal layer, the metal layer connected to the electrode layer through a plurality of vias. 4. The display of claim 1 , further comprising: a cancellation circuit, the cancellation circuit coupled to the electrode layer and configured to cancel a parasitic capacitance effect of one or more of the self-capacitance touch sensor electrodes. 5. The display of claim 4 , wherein: the parasitic capacitance effect comprises an offset current, and the cancellation circuit is configured to cancel the parasitic capacitance effect by at least producing an offset cancellation current to offset the offset current. 6. A method of operating an organic light emitting diode touch sensitive display including a plurality of display pixels, the method comprising: providing: an electrode layer including a plurality of self-capacitance touch sensor electrodes, wherein each of the plurality of self-capacitance touch sensor electrodes is electrically isolated from others of the plurality of self-capacitance touch sensor electrodes; an anode layer; an organic layer, the organic layer including a plurality of organic light emitting diodes; and an encapsulation layer disposed between a cathode layer and the electrode layer; and coupling the cathode layer to AC ground during a touch detection mode of the display, wherein the cathode layer is configured to reduce a parasitic capacitance effect on the plurality of self-capacitance touch sensor electrodes, wherein the parasitic capacitance effect includes an effect from capacitive coupling between the plurality of self-capacitance touch sensor electrodes and the cathode layer, and reducing the parasitic capacitance effect includes reducing the capacitive coupling between the plurality of self-capacitance touch sensor electrodes and the cathode layer. 7. The method of claim 6 , further comprising time multiplexing the touch detection mode of the display and a display mode of the display. 8. The method of claim 6 , further comprising providing a metal layer, the metal layer connected to the electrode layer through a plurality of vias. 9. The method of claim 6 , further comprising: canceling a parasitic capacitance effect of one or more of the self-capacitance touch sensor electrodes using a cancellation circuit coupled to the electrode layer. 10. The method of claim 9 , wherein the parasitic capacitance effect comprises an offset current, the method further comprising canceling the parasitic capacitance effect by at least producing an offset cancellation current, using the cancellation circuit, to offset the offset current. 11. An electronic device comprising: a processor; memory; and an organic light emitting diode touch sensitive display including a plurality of display pixels, the display comprising: an electrode layer including a plurality of self-capacitance touch sensor electrodes, wherein each of the plurality of self-capacitance touch sensor electrodes is electrically isolated from others of the plurality of self-capacitance touch sensor electrodes; a cathode layer that is coupled to AC ground during a touch detection mode of the display and is configured to reduce a parasitic capacitance effect on the plurality of self-capacitance touch sensor electrodes, wherein the parasitic capacitance effect includes an effect from capacitive coupling between the plurality of self-capacitance touch sensor electrodes and the cathode layer, and reducing the parasitic capacitance effect includes reducing the capacitive coupling between the plurality of self-capacitance touch sensor electrodes and the cathode layer; an anode layer; an organic layer, the organic layer including a plurality of organic light emitting diodes; and an encapsulation layer disposed between the cathode layer and the electrode layer. 12. The device of claim 11 , wherein the touch detection mode of the display and a display mode of the display are time multiplexed. 13. The device of claim 11 , further comprising: a metal layer, the metal layer connected to the electrode layer through a plurality of vias. 14. The device of claim 11 , further comprising: a cancellation circuit, the cancellation circuit coupled to the electrode layer and configured to cancel a parasitic capacitance effect of one or more of the self-capacitance touch sensor electrodes. 15. The device of claim 14 , wherein: the parasitic capacitance effect comprises an offset current, and the cancellation circuit is configured to cancel the parasitic capacitance effect by at least producing an offset cancellation current to offset the offset current.

Assignees

Inventors

Classifications

  • the pixel elements being capacitors · CPC title

  • Connection of the pixel electrodes to the thin film transistors [TFT] · CPC title

  • H10K59/40Primary

    OLEDs integrated with touch screens · CPC title

  • using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes · CPC title

  • Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving (Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184) · CPC title

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What does patent US11086444B2 cover?
A self-capacitive touch sensor panel configured to have a portion of both the touch and display functionality integrated into a common layer is provided. The touch sensor panel includes a layer with circuit elements that can switchably operate as both touch circuitry and display circuitry such that during a touch mode of the device the circuit elements operate as touch circuitry and during a di…
Who is the assignee on this patent?
Apple Inc
What technology area does this patent fall under?
Primary CPC classification H10K59/40. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 10 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).