Assessing operating conditions of a receiver in a communication network based on forward error correction decoding properties

US11082157B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11082157-B2
Application numberUS-201916666520-A
CountryUS
Kind codeB2
Filing dateOct 29, 2019
Priority dateOct 29, 2019
Publication dateAug 3, 2021
Grant dateAug 3, 2021

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A system is configured to measure a forward error correction (FEC) decoding property associated with applying FEC decoding to FEC-encoded bits or symbols at a receiver device deployed in a communication network. The system is further configured to provide an assessment of operating conditions of the receiver device based on the FEC decoding property. In one example, the FEC decoding property comprises a distribution of a number of iterations of a FEC decoding operation applied to a plurality of FEC blocks processed within a period of time. In some examples, the FEC decoding property comprises any one of heat, temperature, current, voltage, active clock cycles, idle clock cycles, activity of parallel engines, activity of pipeline stages, and input or output buffer fill level of the FEC decoding. In some examples, the assessment is based on a comparison between the FEC decoding property and reference FEC data.

First claim

Opening claim text (preview).

What is claimed: 1. An electronic device comprising: circuitry configured to store a measured forward error correction (FEC) iteration distribution of a number of iterations of a FEC decoding operation applied to each of a plurality of FEC blocks processed, within a period of time, at a receiver device deployed in a communication network, each FEC block consisting of FEC-encoded bits or symbols encoded using a FEC encoding operation corresponding to the FEC decoding operation; and circuitry configured to store a series of reference FEC iteration distributions, each reference FEC iteration distribution comprising a distribution of a number of iterations of the FEC decoding operation applied to FEC blocks under different predefined noise conditions; and circuitry configured to calculate, based on the measured FEC iteration distribution and the series of reference FEC iteration distributions, an estimate of a noise distribution over the plurality of FEC blocks prior to application of the FEC decoding operation. 2. The electronic device as claimed in claim 1 , further comprising circuitry configured to calculate a trial FEC iteration distribution by combining a trial noise distribution having trial parameters with the series of reference FEC iteration distributions; and circuitry configured to calculate the estimate of the noise distribution by determining the trial parameters which minimize a difference between the trial FEC iteration distribution and the measured FEC iteration distribution. 3. The electronic device as claimed in claim 1 , further comprising circuitry configured to calculate a modified noise distribution based on the estimate of the noise distribution and an additional predefined noise distribution; and circuitry configured to calculate a predicted FEC iteration distribution based on the modified noise distribution and the series of reference FEC iteration distributions. 4. The electronic device as claimed in claim 3 , further comprising circuitry configured to provide an assessment of a predicted change in operating conditions of the receiver device based on the predicted FEC iteration distribution; and circuitry configured to initiate a change in one or more parameters of the communication network based on the assessment. 5. An electronic device comprising: circuitry configured to store a test noise distribution over a plurality of FEC blocks, each FEC block consisting of FEC-encoded bits or symbols encoded using a FEC encoding operation; circuitry configured to store a series of reference FEC iteration distributions, each reference FEC iteration distribution comprising a distribution of a number of iterations of a FEC decoding operation applied to FEC blocks under different predefined noise conditions, the FEC decoding operation corresponding to the FEC encoding operation; and circuitry configured to calculate a predicted FEC iteration distribution based on the test noise distribution and the series of reference FEC iteration distributions. 6. The electronic device as claimed in claim 5 , further comprising circuitry configured to provide an assessment of predicted operating conditions of a receiver device based on the predicted FEC iteration distribution. 7. The electronic device as claimed in claim 6 , further comprising circuitry configured to initiate a change in one or more parameters of a communication network based on the assessment.

Assignees

Inventors

Classifications

  • Block codes (H04L1/0061, H04L1/0064 take precedence) · CPC title

  • Arrangements at the transmitter end · CPC title

  • by adapting the transmission rate · CPC title

  • H04L1/005Primary

    Iterative decoding, including iteration between signal detection and decoding operation · CPC title

  • in which mode-switching is influenced by the user · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11082157B2 cover?
A system is configured to measure a forward error correction (FEC) decoding property associated with applying FEC decoding to FEC-encoded bits or symbols at a receiver device deployed in a communication network. The system is further configured to provide an assessment of operating conditions of the receiver device based on the FEC decoding property. In one example, the FEC decoding property co…
Who is the assignee on this patent?
Shiner Andrew D, Oveis Gharan Shahab, Hubbard Michael, and 2 more
What technology area does this patent fall under?
Primary CPC classification H04L1/005. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 03 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).