Multi zone secondary burst modulation for resonant converters

Patent metadata

Field	Value
Publication number	US-11081966-B2
Application number	US-201916688660-A
Country	US
Kind code	B2
Filing date	Nov 19, 2019
Priority date	Dec 13, 2018
Publication date	Aug 3, 2021
Grant date	Aug 3, 2021

Abstract

A power converter controller includes a control loop clock generator to generate a switching frequency signal responsive to a burst load threshold, a power signal, and a load signal. A switching frequency of the switching frequency signal is above a mechanical audio resonance range of an energy transfer element and above an audible noise frequency. A burst control circuit generates a burst on signal and a burst off signal in response to a feedback signal and a burst enable signal to operate the controller in a plurality of burst modes. A burst frequency of the burst on signal or the burst off signal is less than the mechanical audio resonance range. A request transmitter circuit generates a request signal responsive to the switching frequency signal, the burst on signal, and the burst off signal to control switching of a switching circuit.

First claim

What is claimed is:

1. A controller for use in a power converter, comprising:
a control loop clock generator coupled to generate a switching frequency signal in response to a burst load threshold, a power signal, and a load signal responsive to an output load of the power converter, a switching frequency of the switching frequency signal is above a mechanical audio resonance range of an energy transfer element of the power converter and above an audible noise frequency;
a burst control circuit coupled to generate a burst on signal, and a burst off signal in response to a feedback signal representative of an output of the power converter and a burst enable signal responsive to the burst load threshold and the load signal to operate the controller in a plurality of burst modes, wherein a burst frequency of the burst on signal or the burst off signal is less than the mechanical audio resonance range of the energy transfer element of the power converter; and
a request transmitter circuit coupled to generate a request signal in response to the switching frequency signal, the burst on signal, and the burst off signal to control switching of a switching circuit coupled to the energy transfer element and an input of the power converter.

2. The controller of claim 1 , further comprising:
a burst load threshold circuit coupled to generate the burst load threshold in response to an input voltage signal representative of an input voltage of the power converter; and
a first comparator coupled to generate the burst enable signal in response to a comparison of the burst load threshold and the load signal.

3. The controller of claim 2 , wherein the input voltage signal and the power signal are combined into a single signal sensed from a primary winding of the energy transfer element.

4. The controller of claim 1 , wherein the power signal is representative of one or more of a sensed output power of the power converter, power delivered by the energy transfer element, input power of the power converter, or power processed by the power converter.

5. The controller of claim 1 , further comprising a transconductance amplifier having a first input coupled to receive the feedback signal, a second input coupled to receive a reference signal, and an output coupled to a compensation circuit coupled to an output return of the power converter, wherein the transconductance amplifier is coupled to generate the load signal in response to the feedback signal, the reference signal, and the compensation circuit.

6. The controller of claim 1 , wherein the control loop clock generator comprises:
a multiplexor having a first input coupled to receive the load signal, a second input coupled to receive the burst load threshold, and a select input coupled to receive a light load select signal;
a reference generator coupled to an output of the multiplexor to generate a first clock reference signal and a second clock reference signal;
a second comparator coupled to compare the first clock reference and the power signal;
a third comparator coupled to compare the second clock reference and the power signal; and
a latch having a reset input coupled to an output of the second comparator and a set input coupled to an output of the third comparator, wherein an output of the latch is coupled to generate the switching frequency signal.

7. The controller of claim 1 , wherein the burst control circuit comprises:
a burst thresholds circuit coupled to generate a first threshold signal, a second threshold signal, and a third threshold signal in response to the feedback signal;
a burst timer circuit coupled to generate a first timer signal, a second timer signal, a third timer signal, and a fourth timer signal in response to the third threshold signal, the burst on signal, and the burst off signal; and
a burst state machine coupled to generate the burst on signal, the burst off signal, and a light load select signal in response to the burst enable signal, the first threshold signal, the second threshold signal, the third threshold signal, the first timer signal, the second timer signal, the third timer signal, and the fourth timer signal.

8. The controller of claim 7 , wherein the burst thresholds circuit comprises:
a fourth comparator coupled to generate the first threshold signal in response to a comparison of the feedback signal and a maximum value signal;
a fifth comparator coupled to generate the second threshold signal in response to a comparison of the feedback signal and a minimum value signal; and
a sixth comparator coupled to generate the third threshold signal in response to a comparison of the feedback signal and a regulation value signal.

9. The controller of claim 7 , wherein the burst timer circuit comprises:
a logic gate coupled to be responsive to the third threshold signal and the burst off signal;
a counter having an enable input coupled to an output of the logic gate to generate a decay time signal;
a seventh comparator coupled to generate the first timer signal in response to a comparison of the decay time signal and a first threshold period;
an eighth comparator coupled to generate the second timer signal in response to a comparison of the burst off signal and a second threshold period;
a ninth comparator coupled to generate the third timer signal in response to a comparison of the burst off signal and a third threshold period; and
a tenth comparator coupled to generate the fourth timer signal in response to a comparison of the burst on signal and a fourth threshold period.

10. The controller of claim 7 , wherein the burst state machine is coupled to operate in a plurality of states to operate the controller in the plurality of burst modes, wherein the plurality of burst modes includes a full mode, an intermediate burst mode, a light load burst mode, and a super light load burst mode.

11. The controller of claim 10 , wherein burst state machine is coupled to operate in a first state to operate the controller in the full mode with the burst on signal asserted and with the switching frequency signal responsive to a value of the load signal.

12. The controller of claim 11 , wherein the burst state machine is coupled to transition from the first state to a second state in response to the burst enable signal being asserted or in response to a comparison of the burst off signal and a second threshold period, wherein the burst state machine is coupled to operate in the second state to operate the controller in the intermediate burst mode with the burst off signal asserted, a fixed burst period substantially fixed to the second threshold period, and a burst on period is equal to a difference between the second threshold period and a burst off period.

13. The controller of claim 12 , wherein the burst state machine is coupled to transition from all states back to the first state in response to the burst enable signal being deasserted or in response to a comparison of the feedback signal and a minimum value signal.

14. The controller of claim 12 , wherein the burst state machine is coupled to transition from the second state to a third state in response to a comparison of a time decay signal and a first threshold period, wherein the burst state machine is coupled to operate in the third state to operate the controller in the light load burst mode with the burst on signal asserted and with the switching frequency signal responsive to a value of the burst load threshold.

15. The controller of claim 14 , wherein the burst state machine is coupled to transition from the third state to a fourth state in response to a comparison of the feedback si

Assignees

• Power Integrations Inc

Inventors

• Mayell Robert J
• Wang Yueming
• Colbeck Roger

Classifications

• H02M3/33569 Primary

  having several active switching elements (H02M3/3353 takes precedence) · CPC title

• H02M3/3376 Primary

  with automatic control of output voltage or current · CPC title

• H02M3/33571

  Half-bridge at primary side of an isolation transformer · CPC title

• H02M3/01

  Resonant DC/DC converters · CPC title

• H02M3/33507

  with automatic control of the output voltage or current, e.g. flyback converters (H02M3/33561, H02M3/33569 take precedence) · CPC title