Using tiling depth information in hidden surface removal in a graphics processing system

US11080926B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11080926-B2
Application numberUS-201916683085-A
CountryUS
Kind codeB2
Filing dateNov 13, 2019
Priority dateOct 6, 2014
Publication dateAug 3, 2021
Grant dateAug 3, 2021

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Abstract

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A graphics processing system includes a tiling unit for performing tiling calculations and a hidden surface removal (HSR) unit for performing HSR on fragments of the primitives. Primitive depth information is calculated in the tiling unit and forwarded for use by the HSR unit in performing HSR on the fragments. This takes advantage of the tiling unit having access to the primitive data before the HSR unit performs the HSR on the primitives, to determine some depth information which can simplify the HSR performed by the HSR unit. Therefore, the final values of a depth buffer determined in the tiling unit can be used in the HSR unit to determine that a particular fragment will subsequently be hidden by a fragment of a primitive which is yet to be processed in the HSR unit, such that the particular fragment can be culled.

First claim

Opening claim text (preview).

What is claimed is: 1. A graphics processing system having a rendering space sub-divided into a plurality of tiles, the system comprising: a tiling unit configured to process primitives to determine indication data which indicates, for each of the tiles, which of the primitives are present in that tile; and a hidden surface removal unit configured to perform hidden surface removal for a tile on fragments of the primitives which are indicated by the indication data as being present in that tile; wherein the tiling unit is further configured to: determine depth information for the tiles as the primitives are processed in the tiling unit; and make the determined depth information available for use by the hidden surface removal unit; and wherein the hidden surface removal unit is configured to use the determined depth information in performing said hidden surface removal. 2. The graphics processing system of claim 1 wherein the tiling unit is configured to determine the depth information for the tiles by performing depth tests on the fragments of the primitives as the primitives are processed in the tiling unit. 3. The graphics processing system of claim 2 wherein the tiling unit is configured to include an indicator of a primitive in the indication data for a tile only if the primitive includes at least one fragment which passes at least one of the depth tests and which is present in that tile. 4. The graphics processing system of claim 1 wherein the hidden surface removal unit is configured to: use the determined depth information for a tile to initialise a depth buffer; and perform depth tests on the fragments of the primitives which are present in that tile using the depth buffer. 5. The graphics processing system of claim 1 wherein the tiling unit is configured to determine the indication data by generating tile control streams for the tiles, wherein the tile control stream for a tile includes indicators of the primitives which are present in that tile. 6. The graphics processing system of claim 1 wherein the hidden surface removal unit is configured to use the determined depth information for a tile in setting values of a hidden surface removal (HSR) depth buffer for use in performing said hidden surface removal for that tile. 7. The graphics processing system of claim 1 wherein the tiling unit is configured to determine the depth information for a tile based on a tiling unit depth buffer which indicates depth values at sample positions of that tile, and which is maintained by the tiling unit. 8. The graphics processing system of claim 7 wherein in order to determine the depth information for a tile, the tiling unit is configured to, for a fragment of a primitive that is present in that tile; determine whether the fragment passes a depth test by comparing a depth value of the fragment to a depth value in the tiling unit depth buffer at a corresponding sample position of that tile in accordance with a depth compare mode; and if the fragment passes the depth test and if it is appropriate for the primitive and the depth compare mode, update the depth value in the tiling unit depth buffer at the corresponding sample position of that tile. 9. The graphics processing system of claim 8 wherein the tiling unit is configured to make available the determined depth information for that tile when the tiling unit has finished processing the fragments of the primitives that are present in that tile. 10. The graphics processing system of claim 7 wherein the determined depth information comprises values of a coarse depth buffer, wherein each value of the coarse depth buffer represents a block of values within the tiling unit depth buffer, and wherein the tiling unit is configured to determine the values of the coarse depth buffer in a conservative manner based on the corresponding blocks of values within the tiling unit depth buffer. 11. The graphics processing system of claim 1 wherein the hidden surface removal unit comprises: a hierarchical depth testing module configured to perform an initial hidden surface removal stage at a coarse scale which does not include per-sample depth tests; and a per-sample depth testing module configured to perform a subsequent hidden surface removal stage at the sample scale and which does include per-sample depth tests. 12. The graphics processing system of claim 11 wherein the determined depth information comprises values of a coarse depth buffer, wherein each value of the coarse depth buffer represents a block of values within a tiling unit depth buffer, and wherein the tiling unit is configured to determine the values of the coarse depth buffer in a conservative manner based on the corresponding blocks of values within the tiling unit depth buffer, and wherein the values of the coarse depth buffer are at the same coarse scale of the initial hidden surface removal stage, and wherein the values of the coarse depth buffer are used by the hierarchical depth testing module to perform said initial hidden surface removal. 13. The graphics processing system of claim 1 wherein the tiling unit is configured such that if a primitive which is present in a tile has an object type indicating that the depth of fragments of the primitive cannot be resolved in the tiling unit then an indication for that primitive is included in the indication data for that tile and the depth information is determined for that tile without taking the primitive into account. 14. The graphics processing system of claim 1 wherein the tiling unit is configured to: detect a discontinuity in depth testing to be performed on the fragments of the primitives for a tile; in response to detecting the discontinuity, store: (i) the currently determined depth information as a particular depth record for that tile, and (ii) an identifier of a primitive or primitive block at which the discontinuity is detected; and create a new depth record for that tile for depth information of primitives subsequent to the detection of the discontinuity. 15. The graphics processing system of claim 14 wherein the hidden surface removal unit is configured to use the identifier of the primitive or primitive block at which the discontinuity is detected to determine which of the depth records to use for performing said hidden surface removal on the fragments of the primitives for that tile. 16. The graphics processing system of claim 14 wherein the detected discontinuity in depth testing is caused by a change in a depth compare mode to be used in the depth testing. 17. A method of processing primitives in a graphics processing system having a rendering space sub-divided into a plurality of tiles, the method comprising: processing the primitives at a tiling unit to determine indication data which indicates, for each of the tiles, which of the primitives are present in that tile; and processing the primitives at a hidden surface removal unit by performing, for a tile, hidden surface removal on fragments of the primitives which are indicated by the indication data as being present in that tile; wherein the method further comprises: determining depth information for the tiles at the tiling unit as the primitives are processed in the tiling unit; making available the determined depth information from the tiling unit for use by the hidden surface removal unit; and using the determined depth information in performing said hidden surface removal at the hidden surface removal unit. 18. The method of claim 17 wherein: the depth information for the tiles is determined by perfor

Assignees

Inventors

Classifications

  • General purpose rendering architectures · CPC title

  • G06T15/405Primary

    using Z-buffer · CPC title

  • G06T15/40Primary

    Hidden part removal · CPC title

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What does patent US11080926B2 cover?
A graphics processing system includes a tiling unit for performing tiling calculations and a hidden surface removal (HSR) unit for performing HSR on fragments of the primitives. Primitive depth information is calculated in the tiling unit and forwarded for use by the HSR unit in performing HSR on the fragments. This takes advantage of the tiling unit having access to the primitive data before t…
Who is the assignee on this patent?
Imagination Tech Ltd
What technology area does this patent fall under?
Primary CPC classification G06T15/405. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 03 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).