Method for sorting silicon wafers according to their bulk lifetime

Patent metadata

Field	Value
Publication number	US-11077469-B2
Application number	US-201716331702-A
Country	US
Kind code	B2
Filing date	Sep 7, 2017
Priority date	Sep 8, 2016
Publication date	Aug 3, 2021
Grant date	Aug 3, 2021

Abstract

A Czochralski-type method for sorting wafers obtained by cutting a single-crystal silicon ingot, the method being implemented when the wafers are in an as-cut state or in a shaped-surface state. The method includes a) measuring the majority free charge carrier concentration in an area of each wafer; calculating the thermal donor concentration in the area of each wafer, on the basis of the majority free charge carrier concentration; calculating the charge carrier lifetime limited by the thermal donors in the area of each wafer, on the basis of the thermal donor concentration; determining a bulk lifetime value for the charge carriers in each wafer on the basis of the lifetime limited by the thermal donors; comparing the bulk lifetime value or a normalised bulk lifetime value with a threshold value; and discarding the wafer when the bulk lifetime value or the normalised bulk lifetime value is lower than the threshold value.

First claim

The invention claimed is:

1. A method for sorting wafers obtained by cutting a Czochralski-type monocrystalline silicon ingot, the method being carried out when the wafers are in an as-cut state or in a surface-shaped state and comprising:
a) measuring a majority free charge carrier concentration in at least one area of each wafer;
b) calculating a thermal donor concentration in said area of each wafer from the majority free charge carrier concentration;
c) calculating a thermal donors-limited lifetime of the charge carriers in said area of each wafer, from the thermal donor concentration;
d) determining a bulk lifetime value of the charge carriers in each wafer, from the thermal donors-limited lifetime;
e) comparing the bulk lifetime value or a normalised value of the bulk lifetime with a threshold value; and
f) discarding the wafer when the bulk lifetime value or the normalised value of the bulk lifetime is lower than a threshold value.

2. The method according to claim 1 , wherein said area of each wafer is over 5 mm from the edges of the wafer.

3. The method according to claim 1 , wherein said area of each wafer is in the centre of the wafer.

4. The method according to claim 1 , further comprising calculating the charge carrier lifetime limited by intrinsic recombination mechanisms in said area of each wafer, the bulk lifetime value being further determined from the lifetime limited by the intrinsic recombination mechanisms.

5. The method according to claim 1 , wherein the free charge carrier concentration in said area is obtained from a measurement of photoluminescence of the wafer.

6. The method according to claim 5 , wherein a thickness of the wafers is less than 580 μm.

7. The method according to claim 1 , wherein steps a) to d) are carried out in several areas of each wafer, resulting in a plurality of bulk lifetime values for each wafer, the method further comprising determining, from the plurality of bulk lifetime values, a minimum lifetime value, said minimum value being compared with the threshold value in step e).

8. The method according to claim 1 , further comprising, when the wafers contain dopants, measuring the dopant concentration of each wafer, the thermal donor concentration in said area of each wafer being calculated in step b) from the majority free charge carrier concentration and from the dopant concentration.

9. The method according to claim 8 , wherein the dopant concentration of each wafer is obtained by measuring the majority free charge carrier concentration in an area in the immediate vicinity of an edge of the wafer.

10. The method according to claim 9 , wherein the majority free charge carrier concentration in the area in the immediate vicinity of the edge of the wafer is derived from a measurement of photoluminescence.

11. The method according to claim 1 , wherein the wafers are n-type doped.

12. The method according to claim 1 , wherein the normalised bulk lifetime value is calculated from the bulk lifetime value obtained in step d) and from a resistivity value of the wafer.

13. A method for sorting wafers obtained by cutting a Czochralski-type monocrystalline silicon ingot containing p-type dopants, the method being carried out when the wafers are in an as-cut state or in a surface-shaped state and comprising:
making measurements of a parameter representing a majority free charge carrier concentration in each wafer, the measurements being distributed between an edge and the centre of the wafer;
determining whether said parameter decreases continuously between the edge and centre of each wafer; and

when said parameter decreases continuously:
a) measuring a majority free charge carrier concentration in at least one area of the wafer;
b) calculating a thermal donor concentration in said area of the wafer from the majority free charge carrier concentration;
c) calculating a thermal donors-limited lifetime of the charge carriers in said area of the wafer, from the thermal donor concentration;
d) determining a bulk lifetime value of the charge carriers in the wafer, from the thermal donors-limited lifetime;
e) comparing the bulk lifetime value with a first threshold value;
f) discarding the wafer when the bulk lifetime value is lower than the first threshold value; and

when said parameter does not decrease continuously:
determining a relative variation of said parameter between the minimum of said parameter and a value of said parameter in the centre of the wafer;
comparing the relative variation of said parameter with a second threshold value;
discarding the wafer when the second relative variation of said parameter is higher than the second threshold value;
carrying out steps a) to f) when the relative variation of said parameter is less than the second threshold value.

Assignees

• Commissariat Energie Atomique

Inventors

• Letty Elénore
• Favre Wilfried
• Veirman Jordi

Classifications

• H10P72/0611

  Sorting devices · CPC title

• H10F71/121 Primary

  The active layers comprising only Group IV materials · CPC title

• C30B29/06

  Silicon · CPC title

• B07C5/344 Primary

  according to electric or electromagnetic properties {(sorting according to size measured electrically or electronically B07C5/08; material testing by magnetic means G01N24/00, G01N27/00, by electrical means G01N27/00; electrical measuring devices in general G01R; coin testing G07D5/00)} · CPC title

• Y02E10/547

  Monocrystalline silicon PV cells · CPC title