Protection from hard commutation events at power switches
US-2017285674-A1 · Oct 5, 2017 · US
US11075623B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11075623-B2 |
| Application number | US-201816495917-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 13, 2018 |
| Priority date | Mar 23, 2017 |
| Publication date | Jul 27, 2021 |
| Grant date | Jul 27, 2021 |
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In a method for controlling a direct current switch having first and second semiconductor switches capable of being switched off, the first and second semiconductor switches are arranged between first and second terminals to enable conduction of a current with a first polarity through the first semiconductor switch and conduction of the current with a second polarity that is opposite to the first polarity through the second semiconductor switch. One of the first and second semiconductor switches is switched off as a function of a current measurement value.
Opening claim text (preview).
The invention claimed is: 1. A method for controlling direct current switch, in particular a fault current switch or a circuit-breaker, with the direct current switch having first and second semiconductor switches capable of being switched off, said method comprising: arranging the first and second semiconductor switches between first and second terminals to enable conduction of a current with a first polarity through the first semiconductor switch and conduction of the current with a second polarity that is opposite to the first polarity through the second switch; switching off one of the first and second semiconductor switches as a function of a current measurement value; registering a further current measurement value at a point at which a return current associated with the current measurement value is assumed; forming a difference between the current measurement value and the further current measurement value; and switching off the one of the first and second semiconductor switches, when an amount of the difference is exceeded. 2. The method of claim 1 , wherein the first and second semiconductor switches are arranged antiserially. 3. The method of claim 1 , wherein the first and second semiconductor switches are arranged in an antiparallel circuit and are each embodied in particular as a reverse-blocking IGBT. 4. The method of claim 1 , further comprising switching off one of the first and second semiconductor switches in a fault situation. 5. The method of claim 4 , further comprising detecting the fault situation as a function of a time derivation of the current measurement value to switch off the one of the first and second semiconductor switches. 6. The method of claim 1 , wherein precisely one of the first and second semiconductor switches is switched off. 7. The method of claim 1 , wherein switching off the one of the first and second semiconductor switches is selected as a function of a polarity of the current measurement value of the current. 8. The method of claim 1 , wherein switching off the one of the first and second semiconductor switches is implemented at a first limit value of the first polarity and at a second limit value of the second polarity, with the first limit value being greater than the second limit value by at least 25%. 9. The method of claim 1 , further comprising: detecting a short circuit by U CE monitoring; and switching off the short circuit by a local control device configured to trigger the first and second semiconductor switches, in particular independently of a superordinate controller. 10. The method of claim 1 , further comprising: determining a of the first and second semiconductor switches by formation of an i*t value or i 2 *t value; and switching off the one of the first and second semiconductor switches, when a load limit value is exceeded. 11. The method of claim 1 , wherein the difference is formed frequency-selectively, in particular for frequencies below 1 kHz. 12. A direct current switch, comprising: first and second terminals; first and second semiconductor switches capable of being switched off and arranged between the first and second terminals to enable conduction of a current with a first polarity through the first semiconductor switch and conduction of the current with a second polarity that is opposite to the first polarity through the second semiconductor switch; a local control device configured to switch off the current through the direct current switch as a function of a current measurement value by switching off one of the first and second semiconductor switches; and a current measurement device configured to register a further current measurement value at a point at which a return current associated with the current measurement value is assumed, wherein the local control device is configured to form a difference between the current measurement value and the further current measurement value end to switch off the one of the first and second semiconductor switches, when an amount of the difference is exceeded. 13. The direct current switch of claim 12 , further comprising a comparator configured to detect a polarity of the current. 14. The direct current switch of claim 12 , wherein each of the first and second semiconductor switches has U CE monitoring. 15. The direct current switch of claim 12 , further comprising a protection element between one of the first and second terminals and one of the first and second semiconductor switches. 16. The direct current switch of claim 15 , wherein the protection element is at least one of a switch-disconnector and a fuse. 17. The direct current switch of claim 12 , further comprising a current measurement device and/or a voltage measurement device. 18. The direct current switch of claim 12 , further comprising a superordinate controller configured to switch on and off the first and second semiconductor switches, said local control device including an interface to the superordinate controller. 19. A DC voltage system, comprising: an energy source having a DC voltage; an electric load having a DC voltage connection; and a direct current switch connected to the energy source and the electric load, said direct current switch comprising first and second terminals, first and second semiconductor switches capable of being switched off and arranged between the first and second terminals to enable conduction of a current with a first polarity through the first semiconductor switch and conduction of the current with a second polarity that is opposite to the first polarity through the second semiconductor switch, and a local control device configured to switch off the current through the direct current switch as a function of a current measurement value by switching off one of the first and second semiconductor switches, and a current measurement device configured to register a further current measurement value at a point at which a return current associated with the current measurement value is assumed, wherein the local control device is configured to form a difference between the current measurement value and the further current measurement value and, to switch off the one of the first and second semiconductor switches, when an amount of the difference is exceeded.
in composite switches · CPC title
in integrated circuits · CPC title
Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT · CPC title
by feedback from the output to the control circuit · CPC title
in a symmetrical configuration · CPC title
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