Integrated circuit with triple guard wall pocket isolation
US-2020006474-A1 · Jan 2, 2020 · US
US11069675B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11069675-B2 |
| Application number | US-201816618694-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 17, 2018 |
| Priority date | May 17, 2018 |
| Publication date | Jul 20, 2021 |
| Grant date | Jul 20, 2021 |
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An ESD protection device for bidirectional diode string triggering SCR structure belongs to the field of electro-static discharge of an integrated circuit. A deep N well is arranged on a P substrate, and a first P well, a first N well, a second P well and a second N well are successively arranged from left to right on a surface region of the deep N well. In a second N well region, a mask preparing plate is used to insert the P wells at intervals. The circumference of each P well is isolated by the N well. Each P well is respectively provided with a pair of P+ implantation region and N+ implantation region. The metal wire is connected with the implantation region, and a positive electrode and a negative electrode are led out from the metal wire for forward conduction and reverse conduction.
Opening claim text (preview).
The invention claimed is: 1. An ESD protection device for bidirectional diode string triggering SCR structure, comprising: a diode string formed by a well splitting technique, a bidirectional SCR structure; and a metal wire, wherein the bidirectional SCR structure and the diode string comprise a P substrate, a deep N well, a first P well, a first N well, a second P well, a second N well, a first P+ implantation region, a first N+ implantation region, a second P+ implantation region, a second N+ implantation region, a third P+ implantation region, a third N+ implantation region, a fourth P+ implantation region and a fourth N+ implantation region, wherein the deep N well is arranged on the P substrate, and the first P well, the first N well, the second P well and the second N well are successively arranged from left to right on a surface region of the deep N well; the left edge of the first P well is connected with the left edge of the deep N well; the right side of the first P well is connected with the left side of the first N well; the right side of the first N well is connected with the left side of the second P well; the right edge of the second P well is connected with the left side of the second N well; the right edge of the second N well is connected with the right edge of the deep N well; the first P+ implantation region and the first N+ implantation region are successively arranged from left to right on the surface region of the first P well; the second P+ implantation region and the second N+ implantation region are successively arranged from left to right on the surface region of the first N well; the third P+ implantation region and the third N+ implantation region are successively arranged from left to right on the surface region of the second P well; the fourth P+ implantation region and the fourth N+ implantation region are successively arranged from left to right on the surface region of the second N well, wherein, in the second N well region, a mask preparing plate is used to insert a plurality of P wells at intervals; the circumference of each P well is isolated by the N well; different quantities of diodes are prepared to form a diode string which assists a departure path to effectively suppress the Darlington effect; the surface region of each P well is respectively provided with a pair of P+ implantation region and N+ implantation region; trigger voltage is controlled by increasing or decreasing the number of diodes formed by well splitting, wherein the metal wire is used to connect the implantation region, and lead out two electrodes from the metal wire respectively as the forward conduction and reverse conduction of the ESD protection device, to ensure that a diode formed by well splitting assists a trigger path in conducting, thereby reducing the trigger voltage and turn-on time of the ESD protection device, wherein when the ESD protection device is a bidirectional three-diode triggering SCR structure, in the second N well region, along the Z-axis direction of the ESD protection device, the third P well, the third N well, the fourth P well, the fourth N well, the fifth P well, the fifth N well and the sixth N well are successively inserted on the right side; the fifth P+ implantation region, the fifth N+ implantation region, the sixth P+ implantation region, the sixth N+ implantation region, the seventh P+ implantation region and the seventh N+ implantation region are respectively inserted into the P well, wherein the lower side of the second N well is connected with the lower side of the deep N well; the upper side of the second N well is connected with the lower side of the third P well; the upper side of the third P well is connected with the lower side of the third N well; the upper side of the third N well is connected with the lower side of the fourth P well; the upper side of the fourth P well is connected with the lower side of the fourth N well; the upper side of the fourth N well is connected with the lower side of the fifth P well; the upper side of the fifth P well is connected with the lower side of the fifth N well; the upper side of the fifth N well is connected with the upper side of the deep N well; the fifth P+ implantation region and the fifth N+ implantation region are successively arranged from bottom to top on the surface region of the third P well; the sixth P+ implantation region and the sixth N+ implantation region are successively arranged from bottom to top on the surface region of the fourth P well; the seventh P+ implantation region and the seventh N+ implantation region are successively arranged from bottom to top on the surface region of the fifth P well, wherein the first N+ implantation region is connected with first metal; the second P+ implantation region is connected with second metal; the second N+ implantation region is connected with third metal; the third N+ implantation region is connected with fourth metal; the fourth P+ implantation region is connected with fifth metal; the fourth N+ implantation region is connected with sixth metal; the first P+ implantation region is connected with seventh metal; the third P+ implantation region is connected with eighth metal; the fifth P+ implantation region is connected with ninth metal; the fifth N+ implantation region is connected with tenth metal; the sixth P+ implantation region is connected with eleventh metal; the sixth N+ implantation region is connected with twelfth metal; the seventh P+ implantation region is connected with thirteenth metal; the seventh N+ implantation region is connected with fourteenth metal, wherein the third metal, the sixth metal and the ninth metal are connected with the seventeenth metal; the seventh metal, the eighth metal and the fourteenth metal are connected with the twentieth metal; the tenth metal and the eleventh metal are connected with the eighteenth metal; the twelfth metal and the thirteenth metal are connected with the nineteenth metal, wherein the first metal and the second metal are connected with the fifteenth metal, and a first electrode is led out from the fifteenth metal, and used as a metal anode of the ESD protection device—conducted forward or a metal cathode—conducted reversely, wherein the fourth metal and the fifth metal are connected with the sixteenth metal; a second electrode is led out from the sixteenth metal, and used as a metal cathode of the ESD protection device—conducted forward or a metal anode—conducted reversely, wherein when the first electrode is used as the metal anode of the ESD protection device and the second electrode is used as the metal cathode of the ESD protection device, the first N+ implantation region and the first P well, the first N well and the second P well, the second N well and the fourth P+ implantation region respectively form reverse bias PN junctions, wherein the reverse bias PN junction formed by the first N well and the second P well is an avalanche breakdown junction of the SCR, and the diode formed by the well splitting assists the trigger path in conducting, thereby reducing the trigger voltage and turn-on time of the ESD protection device, wherein when the first electrode is used as the metal cathode of the ESD protection device and the second electrode is used as the metal anode of the ESD protection device, the third N+ implantation region and the second P well, the first N well and the second P+ implantation region, the first N well and the first P+ well respectively form reverse bias PN junctions, and wherein the reverse bias PN junction formed by the first N well and the first P well is an avalanche breakdown junction of the SCR, and the diode formed by the well splitting assists the trigger path in conducting, thereby reducing the trigger voltage and turn-on time of the ESD protection device. 2. The ESD protection device according to claim 1 , wherein when the first electrode
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